Figure 27.
Power Monitor GUI
The following sections describe the details of the Power Monitor GUI.
Display Configure
•
Speed Adjustment: Adjusts the update rate of the current curve.
•
Reset: Regenerates the graph.
Data Record
When the box is checked, the telemetry data of the selected power rail can be
recorded. The data will be saved into a .csv file in the
log
directory.
Temperature
Core A Temp/Core C Temp/F Tile Temp/R Tile 14C Temp/R Tile 15C Temp/R Tile 15A
Temp: FPGA die internal temperature sense diodes.
4.5. BTS Test Areas
BTS checks for hardware fault before you can use the board. If one or more BTS test
items fail, it implies either a wrong hardware setting or hardware fault on specific
interface.
4.6. Identify Test Pass or Fail-based on BTS GUI Test Status
DDR4 DIMMs
Plug the DDR4 DIMM module which is shipped alone with this development kit in
J1/J2. BTS GUI only supports fabric memory interfaces namely DDR4 Comp-CH0,
Comp-CH1, and DIMM.
4. Board Test System
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Intel
®
Agilex
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I-Series FPGA Development Kit User Guide
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