Switch
Default Position
Function
2: FPGA I2C_2 Enable
I2C2 Bus disable
I2C2 Bus enable
3: Main PMBUS Enable
CORE PMBUS disable
CORE PMBUS enable
4: FPGA PMBUS
Enable
SDM_I2C Bus disable
SDM_I2C Bus
enable
SW5[1:4]
OFF/OFF/OFF/X
On-board Intel FPGA Download Cable II is the JTAG host when the
external JTAG header (J10) is unoccupied.
Type
ON
OFF
1: JTAG input source
PCIe EP Edge
connector
On-Board Intel
FPGA Download
Cable II
2: FPGA Bypass
Bypass FPGA
FPGA in JTAG chain
3: Intel MAX
®
10
JTAG Select
Intel MAX 10 JTAG
Enable
Intel MAX 10 JTAG
Disable
4: Not used
X
X
SW6
ON/OFF
When the board is not in a PCIe slot, it must be powered by an external
power supply. The SW6 switch turns on the power of the board when it
is at the ON position and turns off the power when it is at the OFF
position.
When the board is in a PCIe slot, the external and auxiliary power
supplies must still be connected. The SW6 switch can be left at either
the ON or OFF position. The board can only be powered on when both
power sources are present.
Figure 3.
SW1[1:4] Switch Setting
3. Development Board Setup
683288 | 2022.09.22
Intel
®
Agilex
™
I-Series FPGA Development Kit User Guide
12
