3-9
3
3.4.2
Event Status Register
The Event Status Register reports events that are common to all 488.2
devices. This includes events such as self test errors, command errors,
execution errors, power on and operation complete. The Power-on event
occurs at power turn-on and can be used to signal a power off-on occur-
rence. The External Data Ready flip-flop is included in the Event Status
Register as Bit 6. The 488.2 Operation Complete event is not implemented.
The Event Status Register is read with the
*ESR?
query. Use the *ESE
commands to set the Event Status Enable Register as shown in the following
example:
*ESE 60
'enables error bits 2 through 5 for errors
*ESE 124
'enables error bits 2 through 5 and the EDR bit
*ESE?
'quires the enabling register setting
3.4.3
Questionable Registers and Digital Inputs
The Questionable Registers let the user read the first fifteen digital input
lines and detect any changes in the digital inputs. Bit alignments are shown
in Figure 3-2. The Questionable Transition Register filters the inputs and
passes only the enabled state changes to the Questionable Event Register.
The Questionable Event Register bits becomes true (1) when the positive
transition bit is enabled and the associated condition register bit makes a 0
to 1 transition or when the negative transition bit is enabled and the
associated condition register bit makes a 1 to 0 transition. When both
transitions are selected for the same bit, the corresponding Questionable
Event Register bit sets whenever the digital input changes state. The
Questionable Event Register is cleared when it is read.
The Questionable Registers are queried with the SCPI STATUS branch
commands.
3.4.3.1 Monitoring Digital Inputs for State Changes
The 4863 can be set to monitor the digital inputs and generate a SRQ or SRM
when they change state. The following example sets the Questionable
Event register to monitor digital inputs CH1 and CH2 by capturing a
positive transition on bit 0 and a negative transition on bit 1:
