Evaluation Board Manual
PPC750FX Evaluation Board
Preliminary
Switches
Page 40 of 115
750FXebm_ch6.fm
June 10, 2003
6.2 ATX Power-on Pushbutton
When pressed, the pushbutton switch at U53 generates a power-on signal to the external ATX power supply
connected to J34. This pushbutton must be pressed
after the ATX power supply is connected to J34 in order
to activate the power supply
Note: If the board is plugged into a PCI slot, the external ATX power supply will not activate under any
conditions, and pressing U53 will have no effect.
6.3 CPU 0 PLL Configuration
An 8-position DIP switch at location U30 configures the PLL for the first PPC750FX processor (U1).
Table 6-3. Reset Pushbutton—U53
Signal
Description (0 = ON = close)
PS_ON
Generates power-on signal to the external ATX power connector.
Table 6-4. CPU 0 PLL Configuration—U30
Switch No.
Signal
Default Setting
Description (0 = ON = closed, 1 = OFF = open)
1
PLL_CONFIG0
ON
Refer to the latest version of the
PowerPC 750FX
RISC Microprocessor Data Sheet for details on the bit
settings for PLL_CONFIG and PLL_RANGE.
2
PLL_CONFIG1
OFF
3
PLL_CONFIG2
ON
4
PLL_CONFIG3
OFF
5
PLL_CONFIG4
OFF
6
PLL_RANGE0
ON
7
PLL_RANGE1
ON
8
SPARESWITCH1
ON
Input to CPLD F2 pin with pull-up to +3.3 V. See CPLD
Register1.