IBM PPC750FX, User Manual

Page: 89 / 116

Evaluation Board Manual
Preliminary PPC750FX Evaluation Board
750FXebm_ch11.fm
June 10, 2003 CPLD Programming
Page 89 of 115
11.1.2.6 reset_block Program
The following code listing defines the function of the logic in the reset_block part of the CPLD:
INCLUDE "lpm_ff.inc";
SUBDESIGN reset_block
(
25Mclk : INPUT;
rw_hreset : INPUT;
rw_sreset : INPUT;
rw_trst : INPUT;
mpp_reset_2ms_n: INPUT;
mpp0_hreset_n : INPUT;
mpp0_sreset_n : INPUT;
mpp1_hreset_n : INPUT;
mpp1_sreset_n : INPUT;
mpp_reset_out_n : INPUT;
initact : INPUT;
pgd : INPUT;
target/host_n : INPUT;
serial_eeprom : INPUT;
pci_reset_n : BIDIR;
sysreset_n : OUTPUT;
cpu0_hreset_n : OUTPUT;
cpu0_sreset_n : OUTPUT;
cpu1_hreset_n : OUTPUT;
cpu1_sreset_n : OUTPUT;
cpu_trst_n : OUTPUT;
cpufan_ok_n : INPUT;
ignore_fans_n : INPUT;
mpp_block_n : INPUT;
nofan_n : OUTPUT;
sloclk : OUTPUT;
ATX_OK_N : INPUT;
led_red_n : OUTPUT;
sysreset : OUTPUT;
)
VARIABLE
del_rw_hreset[1..0]: dff;
del_rw_sreset[1..0]: dff;
del_rw_trst[1..0] : dff;