Evaluation Board Manual
Preliminary
PPC750FX Evaluation Board
750FXebm_ch10.fm
June 10, 2003
Connectors
Page 53 of 115
10. Connectors
The location, type, function, and pin assignment for all board connections are described in the following
sections. Connectors are listed in
Table 10-1 and shown in Figure 10-1. Test connections are described in
Section 10.12 and shown in Figure 10-13.
Table 10-1. Connectors
Location
Function
Page
J34
ATX Power
J4
CPU Fan Power
J11
RISCWatch JTAG
J13
RJ11, Serial Ports 1 (Right) and 2 (Left)
J14
System Controller Device Address Bus
J15
Memory Control
J19
Spare Connector
–
J20
RJ45, Ethernet Ports 1(Left) and 2 (Right)
J25
PCI Connector
J26
CPLD JTAG Connector
Jxx
Ground connectors: J1, J2, J7, J9, J10, J12, J17, J18, J23, J24
J31–J33,
J36–J45
Factory test only (not populated)
–
U39
SMA, External Clock Input
TPxx
Test Connections