Evaluation Board Manual
Preliminary
PPC750FX Evaluation Board
750FXebm_ch4.fm
June 10, 2003
Programming the System Controller
Page 31 of 115
4. Programming the System Controller
This section provides guidance on programming the system controller to agree with the board design.
4.1 DDR SDRAM
The following are the characteristics of the DDR SDRAM memory on the PPC750FX evaluation board:
4.1.1 SDRAM Controller Initialization
See Marvell MV64360/1/2 data sheet.
4.2 Device Controller Bank Register Settings
The following sections define the settings for the device controller bank registers in the system controller.
Table 4-1. DDR SDRAM Characteristics
Memory Type
DDR SDRAM
Number of Row Addresses
13
Number of Column Addresses
9
Number of Module Banks
2
SDRAM Width, Primary
16 bits
Error Checking SDRAM Width
8 bits
Data Width
72 bits
Number of SDRAM Banks
4
