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Specifications are subject to change without notice
MEDIATEK CONFIDENTIAL, NO DISCLOSURE
29
9-11 DRAM Interface
Ca
Cb
Ra
Qa
Db
BS
BS
BS
BS
Ra
CLK
RAS
CAS
WE
ADR
BA
AP
DQ
DQM
tRCD
tSH
tSS
Rb
BS
Rb
tRAS
tRP
tWR
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Row Active
Read
Write
Precharge
Row Active
-6
-7
-75
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Units
CLK cycle time
CAS latency = 3
tCC
7.5
-
7.5
-
7.5
-
ns
SDRAM input setup time
tSS 1.5 1.75
1.75 ns
SDRAM input hold time
tSH
1
1
1
ns
Active to Precharge command period
tRAS
42
100K
49
100K
52
100K
ns
Precharge
to
Active
command
period
tRP 18 20 20 ns
Active
to
read/write
command
delay
tRCD
18 20 20 ns
Write recovery time
CL = 3
tWR
6
7
7.5
ns
Mediatek
Confidential
Only
For
SAC