Chapter 2
43
System Board
Chipset
PCI to ISA/EIO Bridge
PIIX4E compatible with the PCI Rev. 2.1 specification, as well as the IEEE 996
specification for the ISA (AT) bus. On PCI, PIIX4E operates as a master for various
internal modules, such as the USB controller, DMA controller, IDE bus master controller,
distributed DMA masters, and on behalf of ISA masters. PIIX4E operates as a slave for its
internal registers or for cycles that are passed to the ISA or EIO buses.
ISA Bus Interface
As well as accepting cycles from the PCI bus interface, and translating them for the ISA
bus, the ISA bus interface also requests the PCI master bridge to generate PCI cycles on
behalf of a DMA or ISA master. The ISA bus interface contains a standard ISA bus
controller and data buffering logic. Refer to the section “Devices on the ISA Bus” in this
chapter for a description of the devices on the ISABus.
SMBus Controller
The System Management (SM) bus is a two-wire serial bus provided by the PIIX4E
controller. It runs at a maximum of 16 kHz. The SMBus Host interface allows the CPU to
communicate with SMBus slaves and an SMBus Slave interface that allows external
masters to activate power management events. The bus also monitors some of the
hardware functions of the main board, both during boot-up and run-time. All accesses to
the bus are handled by the main processor, via the PIIX4E SMBus registers. Refer to the
section “Devices on the SMBus” for a description of the devices on the SMBus, or to the
section “HP MaxiLife Utility” in this chapter for information on the MaxiLife ASIC.
IDE Controller
The PCI master/slave IDE controller (Bus Master capability and synchronous DMA mode),
supporting two devices is described in the section “Integrated Drive Electronics (IDE)” in
this chapter.
Timers Based on 82C54
• System Timer, Refresh Request, Speaker
Tone Output.
SMBus
• Host Interface allows CPU to communicate
via SMBus.
• Slave interface allows external SMBus
Master to control
Resume Events.
324 mBGA Package
Table 2-3. PIIX4E (82371EB) Chip Features
Feature
Feature
Summary of Contents for X Class 500/550MHz
Page 6: ...6 Contents ...
Page 8: ...8 Figures ...
Page 15: ...15 1 System Overview ...
Page 66: ...66 Chapter2 System Board Devices on the ISA Bus ...
Page 96: ...96 Chapter3 Interface Boards and Mass Storage Drivers Connectors and Sockets ...
Page 134: ...134 Chapter5 Tests and Error Messages Beep Codes ...
Page 135: ...135 A Regulatory Information and Warranty ...
Page 146: ...146 AppendixA Regulatory Information and Warranty HP Hardware Warranty ...