Fuji Electric micrex-sx NP1F-MP1, User Manual

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5-26
) d n a m m o c t c e t e d n o i t i s o p t p u r r e t n i e s l u p l a n r e t x E : e m a n l a n g i S ( 9 t i B
<Description>
• While the external pulse interrupt position detect command is “1,” external pulse interrupt signal detection is
enabled.
) d n a m m o c p o t s - d n a - n o i t a r e l e c e D : e m a n l a n g i S ( 0 1 t i B
<Description>
• In the pulse generation mode, when this signal becomes “1,” operation is decelerated and then stopped according
to the set values of acceleration/deceleration register 1.
Even when this signal becomes “0” during the processing for deceleration, the processing for stop is continued.
While this signal is “1,” the detection of the start signal rising edge is disabled.
Frequency (Hz)
Time (t)
Start command
(PC == > MP1)
Deceleration-and-stop command
(PC == > MP1)
Positioning end
(PC <== MP1)
Command pulse zero
(PC <== MP1)
“1”
“1”
“1” “1”
“0”
• In the position command mode, the start signal for module internal processing is cleared to zero, and pulse output
is immediately stopped.
Precautions:
• When automatic computation of the deceleration point is enabled, the deceleration point register is reset to zero
when deceleration-and-stop processing is completed, but the command pulse register is not reset.
(When the command pulse register is “0,” the bit data signal for command pulse zero becomes “1.”)
• After being stopped by the deceleration-and-stop command, if the bit data signal for command pulse zero is “0,” the
remaining pulses are output by the start command.
• The command pulse register is cleared to zero at the rising edge of the command pulse register reset command.
• Even when effective data exists in the positioning data first-read FIFO buffer, the command pulse zero bit becomes
“0.” The FIFO buffer is also cleared at the rising edge of the command pulse register reset command.
5-2 NP1F-MP1 I/O Area