Freescale Semiconductor MC9S12XHY Series, Reference Manual

Page: 757 / 802

Electrical Characteristics
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor 757
In Table A-27 the timing characteristics for slave mode are listed.
Table A-27. SPI Slave Mode Timing Characteristics
Num C Characteristic
Sy
mb
ol
Min Typ Max Unit
1 D SCK frequency f
sck
DC —
MIN(8,f
bus
/4)
1
1
SPI on non-motor pad ports (Port S or Por t H), or SPI on motor pad ports with all Slew Rate control disable
MHZ
MIN(0.8,f
bus
/4)
2
2
SPI on Port V with slew rate control enabled. All the SPI pins slew rate control should be enabled
1 D SCK period t
sck
4*t
bus
1
—
∞
ns
MAX(1250, 4*t
bus
)
2
2 D Enable lead time t
lead
4 — — t
bus
3 D Enable lag time t
lag
4 — — t
bus
4 D Clock (SCK) high or low time t
wsc
k
4 — — t
bus
5 D Data setup time (inputs) t
su
8 — — ns
6 D Data hold time (inputs) t
hi
8 — — ns
7 D Slave access time (time to data active) t
a
— — 20 ns
8 D Slave MISO disable time t
dis
— — 22 ns
9 D Data valid after SCK edge t
vsc
k
— — 29 + 0.5
⋅
t
bus
3
3
0.5 t
bus
added due to internal synchronization delay
ns
10 D Data valid after SS fall t
vss
— — 29 + 0.5
⋅
t
bus
1
ns
11 D Data hold time (outputs) t
ho
20 — — ns
12 D Rise and fall time inputs t
rfi
— — 8 ns
13 D Rise and fall time outputs t
rfo
— — 8 ns
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