Stepper Stall Detector (SSDV1) Block Description
MC9S12XHY-Family Reference Manual, Rev. 1.01
708
Freescale Semiconductor
21.3.2.4
Stepper Stall Detector Flag Register (SSDFLG)
Read: anytime
Write: anytime.
l
21.3.2.5
Modulus Down-Counter Count Register (MDCCNT)
Read: anytime
Write: anytime.
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
MCZIF
0
0
0
0
0
0
AOVIF
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 21-5. Stepper Stall Detector Flag Register (SSDFLG)
Table 21-10. SSDFLG Field Descriptions
Field
Description
7
MCZIF
Modulus Counter Underflow Interrupt Flag — This flag is set when the modulus down-counter reaches
0x0000. If not masked (MCZIE = 1), a modulus counter underflow interrupt is pending while this flag is set. This
flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
0
AOVIF
Accumulator Overflow Interrupt Flag — This flag is set when the Integration Accumulator has a positive or
negative overflow. If not masked (AOVIE = 1), an accumulator overflow interrupt is pending while this flag is set.
This flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
Module Base + 0x0004
15
14
13
12
11
10
9
8
R
MDCCNT
W
Reset
1
1
1
1
1
1
1
1
Figure 21-6. Modulus Down-Counter Count Register High (MDCCNT)
Module Base + 0x0005
7
6
5
4
3
2
1
0
R
MDCCNT
W
Reset
1
1
1
1
1
1
1
1
Figure 21-7. Modulus Down-Counter Count Register Low (MDCCNT)
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