Analog-to-Digital Converter (ADC12B12CV1) Block Description
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
321
0x0024
ATDDR10
R
See
Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and
Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0026
ATDDR11
R
See
Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and
Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0028 -
0x002F
Unimple-
mented
R
0
0
0
0
0
0
0
0
W
Address
Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented or Reserved
Figure 10-2. ADC12B12C Register Summary (Sheet 3 of 3)
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