MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
519
Chapter 16
Timer Module (TIM16B8CV2) Block Description
16.1
Introduction
The basic timer consists of a 16-bit, software-programmable counter driven by a enhanced programmable
prescaler.
Table 16-1. Revision History
Revision
Number
Revision Date
Sections
Affected
Description of Changes
V02.04
1 Jul 2008
16.3.2.12/16-53
5
16.3.2.13/16-53
5
16.3.2.16/16-53
8
16.4.2/16-543
16.4.3/16-543
- Revised flag clearing procedure, whereby TEN bit must be set when clearing
flags.
V02.05
9 Jul 2009
16.3.2.12/16-53
5
16.3.2.13/16-53
5
16.3.2.15/16-53
7
16.3.2.16/16-53
8
16.3.2.19/16-54
0
16.4.2/16-543
16.4.3/16-543
- Revised flag clearing procedure, whereby TEN or PAEN bit must be set
when clearing flags.
- Add fomula to describe prescaler
V02.06
26 Aug 2009
16.1.2/16-520
16.3.2.15/16-53
7
16.3.2.2/16-526
16.3.2.3/16-527
16.3.2.4/16-528
16.4.3/16-543
- Correct typo: TSCR ->TSCR1
- Correct reference: Figure 1-25 -> Figure 1-31
- Add description, “a counter overflow when TTOV[7] is set”, to be the
condition of channel 7 override event.
- Phrase the description of OC7M to make it more explicit
V02.07
04 May 2010
16.3.2.8/16-531
16.3.2.11/16-53
4
16.4.3/16-543
- Add
Table 16-10
- in TCRE bit description part,add Note
- Add
Figure 16-31
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