Device Overview MC9S12XHY-Family
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
19
— 2 x 32-bit
— 4 x 16-bit
— 8 x 8-bit
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Wakeup with integrated low pass filter option
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Loop back for self test
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Listen-only mode to monitor CAN bus
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Bus-off recovery by software intervention or automatically
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16-bit time stamp of transmitted/received messages
1.3.15
Serial Communication Interface Module (SCI)
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Full-duplex or single-wire operation
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Standard mark/space non-return-to-zero (NRZ) format
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Selectable IrDA 1.4 return-to-zero-inverted (RZI) format with programmable pulse widths
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13-bit baud rate selection
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Programmable character length
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Programmable polarity for transmitter and receiver
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Active edge receive wakeup
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Break detect and transmit collision detect supporting LIN
1.3.16
Serial Peripheral Interface Module (SPI)
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Configurable 8- or 16-bit data size
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Full-duplex or single-wire bidirectional
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Double-buffered transmit and receive
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Master or slave mode
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MSB-first or LSB-first shifting
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Serial clock phase and polarity options
1.3.17
Analog-to-Digital Converter Module (ATD)
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Up to 12-channel, 10-bit analog-to-digital converter
— 3 us single conversion time
— 8-/10 bit resolution
— Left or right justified result data
— Internal oscillator for conversion in stop modes
— Wakeup from low power modes on analog comparison > or <= match
— Continuous conversion mode
— Multiple channel scans
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Pins can also be used as digital I/O
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