TSTSC
BLKSC
BLOCK
TSTAUTSY
AUTOSYOK
PHDIFFME
FRDIFFME
VDIFFME
PHDIFFA
VOKSC
VDIFFSC
OR
AND
AND
AND
AND
AND
AND
phaseAngleDifferenceValue
frequencyDifferenceValue
voltageDifferenceValue
1
1
AND
Note! Similar logic for Manual Synchrocheck.
1
FRDIFFA
ANSI08000018-2-en.vsd
OperationSC = Enabled
VDiffSC
FreqDiffA
PhaseDiffA
Bus voltage >80%
of
GblBaseSelBus
Line voltage >80%
of
GblBaseSelLine
PhaseDiff > 60°
100 ms
INADVCLS
AND
AND
PhaseDiff < 5°
0
0-tSCA
0
50 ms
80 ms
0
ANSI08000018 V2 EN
Figure 165:
Simplified logic diagram for the Auto Synchronism function
11.1.7.3
Synchronizing
When the function is set to
OperationSynch
=
Enabled
the measuring will be performed.
The function will compare the values for the bus and line voltage with internally preset
values that are set to be 80% of the set
UBase
selected for
GlbBaseSelBus
and
GlbBaseSelLine
, which is a supervision that the voltages are both live. Also the voltage
difference is checked to be smaller than the internally preset value 0.10, which is a p.u
value of set voltage base values. If both sides are higher than the preset values and the
1MRK 506 335-UUS A
Section 11
Control
355
Technical manual
Summary of Contents for REL650 series
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