3. Theory of Operation
35
ZT8995
Memory Support Address Bus
Boot PROM
System Address
Buffers
Memory Support Data Bus
EEPROM
GAL
System Address, Data and Control
STD BUS
RJ45
Transformer
Transformer
CTI
BNC
Filters/
AUI
SRAM
SRAM
Transformers
Interrupts
DP83905
AT/LANTIC
Functional Diagram
I/O Port Decode
The ZT 8995 requires 32 contiguous I/O address ports. These I/O ports are decoded by
the 16-bit I/O decode logic and the LAN interface chip. The LAN interface chip decodes
10 of the 16-bit I/O addresses while the remaining six bits are decoded by the PAL as a
"low" or logical 0 for complete 16-bit I/O decode logic without redundancy. IO EXP is
ignored and not decoded.
Shared Memory Addressing
When the ZT
8995 is configured for shared memory support (not NE2000
plus
compatible) the Memory addresses are decoded by the DP83905 for selecting either
the Ethernet packet RAM or the PROM socket. The ZT 8995 board's packet RAM may
be assigned any 16K memory space but should be located within a range of addresses
located above the system memory (typically 640K). The ZT 8995 may require as much
as 48 Kbytes of memory space for its 16 Kbyte RAM buffer and a user-installed
32 Kbyte PROM. Both the RAM buffer and the PROM device are located in the 24-bit
memory range of 000000 to FFE000h. If you require 20-bit memory addressing, use the
setup program to configure the lower 20 bits of address and set the upper four bits to 0;
then set the upper four bits of the memory address bus to 0 with jumpers
W4-7
.
EPROM Socket
The ZT 8995 includes a PROM socket that can accommodate 32, 64, 128, or 256 Kbyte
parts where only the top 32 Kbyte block is accessible. In shared memory mode (not
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