n
PID Block Diagram
-
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
+
+
+
+
Frequency
Reference 1
Frequency Reference 1 to 16
Option Card
Serial Comm
Analog Input
A1/A2
Pulse Input
b1-01
PID disable when:
- b5-01=0
- a JOG Command is Input
- PID Disable by Digital Input Enabled
PID Block Diagram
d1-01 to d1-16
1
2
3
0
PID
Target
PID Soft
Starter b5-17
PID SFS Cancel DI
H1-
oo
=34
4
b5-01
1/2
3/4
1/2
3/4
0
Of
f
On
not 1
PID Set Point
(U5-04)
b5-18=1
0
Reg. 0Fh, bit 1
PID Feedback
PID Feedback
(U5-01)
H6-01=2
H3-02/10=C
H6-01=1
not B
not C
not 2
not 1
H3-02/10=B
Analog Input
A1/A2
Pulse Input
MEMOBUS Reg. 0006h
b5-19
0
1
Analog Input
A1/A2
Pulse Input
0
PID Input
(U5-02)
b5-05
b5-01
2 or 4
1 or 3
PID Input
Limit
b5-35
Analog Input
A1/A2
0
not 16
H3-02/10
= 16
PID Dif
ferential
Feedback
(U5-05)
Adjusted
PID Feedback
(U5-06)
Derivative
T
ime
Proportional
Gain
b5-02
I-time
b5-03
Integral Hold
H1-
oo
=31
1
0
PID Input
Characteristic
H1-
oo
=35
1
0
Derivative
T
ime
PID Ouput
(U5-03)
b5-08
I - limit
b5-04
PID Output
Upper/Lower
Limit
b5-06 / b5-34
PID Delay
T
ime
Integral Reset
H1-
oo
=30
PID Output
Characteristic
b5-09
1 or 3
2 or 4
b5-01
Disabled
Enabled
Upper Limit
Fmax x109%
Lower Limit
Fmax x109%
Lower Limit 0
Upper Limit
Fmax x109%
1
Output
Frequency
Enable / Disable Reverse
Operation when PID
Output is Negative
0
b5-07
b5-10
PID Output
Gain
PID Of
fset
b5-15
Sleep Level
RUN
On/Of
f
Delay
T
imer
Sleep Function
SFS
C1-
oo
b5-1
1
1
0
Always 1 when
b5-01 = 3/4
b5-16
1/s
-1
Z
-1
Z
-1
-1
Z
-1
P
1
0
PID SFS Cancel DI
H1-
oo
=34
b5-05
Figure 5.17 PID Block Diagram
5.2 b: Application
138
YASKAWA ELECTRIC SIEP C710606 18F YASKAWA AC Drive – V1000 Technical Manual