Table of Contents
vi
Special I/O Control Registers .............................................................................. 82
Pattern Definition Registers ............................................................................................. 83
Pattern Polarity Register...................................................................................... 83
Pattern Transition Register .................................................................................. 83
Pattern Mask Register.......................................................................................... 83
Port A and B Data Registers................................................................................ 84
Port C Data Register ............................................................................................ 85
Counter/Timer Control Registers ........................................................................ 85
Counter/Timer Mode Specification Registers ..................................................... 85
Counter/Timer Command Status Registers ......................................................... 87
Counter/Timer Time Constant Registers............................................................. 89
Counter/Timer Current Count Registers ............................................................. 90
Interrupt Related Registers ............................................................................................... 90
Interrupt Vector Registers ................................................................................... 90
Current Vector Register....................................................................................... 91
I/O Port Operation ............................................................................................................ 92
Overview.............................................................................................................. 92
Pattern-Recognition Logic Operation.................................................................. 92
Bit Port Operation................................................................................................ 92
Bit Port Simple Operation ................................................................................... 92
Bit Port Pattern-Recognition Operation .............................................................. 93
Counter/Timer Operation ................................................................................................. 94
Counter/Timer Architecture ................................................................................ 94
Counter/Timer Sequence Of Events .................................................................... 95
Initializing the Counter/Timer............................................................................. 95
Starting the Counter/Timer.................................................................................. 96
Countdown Sequence .......................................................................................... 96
Ending Condition................................................................................................. 97
Counter/Timer Output ......................................................................................... 98
Linked Sequence.................................................................................................. 98
Interrupt Operation ........................................................................................................... 99
Overview.............................................................................................................. 99
Priority Handling and the CIO............................................................................. 99
The Four Interrupt Logic Functions .................................................................... 99
Generating the Interrupt Request......................................................................... 99
Identification of the Highest-Priority Interrupt Request ................................... 100
Interrupt Operation ............................................................................................ 101
CIO Initialization............................................................................................................ 101
Introduction ....................................................................................................... 101
Enable Bits Operation........................................................................................ 102
Programming .................................................................................................................. 102
Interrupt Code Example..................................................................................... 103
Appendix A — Schematic
..................................................................................................... 107
Index
........................................................................................................................................... 111
