A-38
Sun Netra X4450 Server Service Manual • August 2008
A.5.3
POST Code Checkpoints
The POST code checkpoints are the largest set of checkpoints during the BIOS
pre-boot process.
TABLE A-4
describes the type of checkpoints that might occur
during the POST portion of the BIOS. These two-digit checkpoints are the output
from primary I/O port 80.
052a
PCI devices - Disable all devices.
122a
ISA devices - Static device initialization.
152a
PCI devices - Static device initialization.
252a
PCI devices - Output device initialization.
202c
Initializing different devices. Detecting and initializing the video adapter installed in the
system that have optional ROMs.
002e
Initializing all the output devices.
0033
Initializing the silent boot module. Set the window for displaying text information.
0037
Displaying sign-on message, CPU information, setup key message, and any OEM specific
information.
4538
PCI devices - IPL device initialization.
5538
PCI devices - General device initialization.
8600
Preparing CPU for booting to OS by copying all of the context of the BSP to all application
processors present. Note: APs are left in the CLI HLT state.
TABLE A-4
POST Code Checkpoints
Post Code
Description
03
Global initialization before the execution of actual BIOS POST. Initialize BIOS Data Area
(BDA) variables to their default values. Initialize POST data variables. NMI, parity, video
for EGA, and DMA controllers are disabled at this point.
04
Checks CMOS diagnostic byte to verify that battery power and CMOS checksum is OK.
Verify CMOS checksum manually by reading storage area. If the CMOS checksum is bad,
update CMOS with power-on default values and clear passwords. Initialize status register
A. Initializes data variables that are based on CMOS setup questions. Initializes both the
8259 compatible PICs in the system.
05
Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table.
TABLE A-3
POST Codes
(Continued)
Post Code
Description
