A-34
Sun Netra X4450 Server Service Manual • August 2008
A.5.1
How BIOS POST Memory Testing Works
The BIOS POST memory testing is performed as follows:
1. The first megabyte of DRAM is tested by the BIOS before the BIOS code is
shadowed (that is, copied from ROM to DRAM).
2. Once executing out of DRAM, the BIOS performs a simple memory test (a
write-read of every location with the pattern
55aa55aa)
.
Note –
Enabling Quick Boot causes the BIOS to skip the memory test. See
Section
“Change POST Options” on page A-33
for more information.
Note –
Because the server can contain up to 64 MByte of memory, the memory test
can take several minutes. You can cancel POST testing by pressing any key during
POST.
3. The BIOS polls the memory controllers for both correctable and uncorrectable
memory errors and logs those errors into the service processor.
Redirect Console Output
Use the following instructions to access the service processor and redirect the
console output so that the BIOS POST codes can be read.
1. Initialize the BIOS Setup utility by pressing the F2 key while the system is
performing the power-on self-test (POST).
The BIOS Main menu screen is displayed.
2. Select the Advanced menu tab.
The Advanced Settings screen is displayed.
3. Select IPMI 2.0 Configuration.
The IPMI 2.0 Configuration screen is displayed.
4. Select the LAN Configuration menu item.
The LAN Configuration screen displays the service processor’s IP address.
5. To configure the service processor’s IP address (optional):
a. Select the IP Assignment option that you want to use (DHCP or Static).
