Renesas ZTAT H8S/2357F, Руководство по оборудованию

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Rev.6.00 Oct.28.2004 page 442 of 1016
REJ09B0138-0600H
12.3 Operation
12.3.1 TCNT Incrementation Timing
TCNT is incremented by input clock pulses (either internal or external).
Internal Clock: Three different internal clock signals (ø/8, ø/64, or ø/8192) divided from the system clock (ø) can be
selected, by setting bits CKS2 to CKS0 in TCR. Figure 12-2 shows the count timing.
ø
Internal clock
Clock input
to TCNT
TCNT N–1 N N+1
Figure 12-2 Count Timing for Internal Clock Input
External Clock: Three incrementation methods can be selected by setting bits CKS2 to CKS0 in TCR: at the rising edge,
the falling edge, and both rising and falling edges.
Note that the external clock pulse width must be at least 1.5 states for incrementation at a single edge, and at least 2.5
states for incrementation at both edges. The counter will not increment correctly if the pulse width is less than these
values.
Figure 12-3 shows the timing of incrementation at both edges of an external clock signal.
ø
External clock
input
Clock input
to TCNT
TCNT N–1 N N+1
Figure 12-3 Count Timing for External Clock Input