RZ/G1M
5. Pin Function Controller (PFC)
R01UH0626EJ0100 Rev.1.00
5-38
Sep 30,2016
5.3.25
Peripheral Function Select Register 15 (IPSR15)
Function: IPSR15 selects the functions of the multiplexed LSI pins.
Bit:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
—
—
IP15
[29]
IP15
[28]
IP15
[27]
IP15
[26]
IP15
[25]
IP15
[24]
IP15
[23]
IP15
[22]
IP15
[21]
IP15
[20]
IP15
[19]
IP15
[18]
IP15
[17]
IP15
[16]
Initial
value:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W:
R/W R/W R/W R/W R/W R/W
R/W
R/W
R/W
R/W
R/W
R/W R/W R/W R/W
R/W
Bit:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IP15
[15]
IP15
[14]
IP15
[13]
IP15
[12]
IP15
[11]
IP15
[10]
IP15
[9]
IP15
[8]
IP15
[7]
IP15
[6]
IP15
[5]
IP15
[4]
IP15
[3]
IP15
[2]
IP15
[1]
IP15
[0]
Initial
value:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W:
R/W R/W R/W R/W R/W R/W
R/W
R/W
R/W
R/W
R/W
R/W R/W R/W R/W
R/W
Bit Initial
Value
R/W
Description
31 to 0
H'0000 0000
R/W
The functions of the LSI pins are selected according to the table below.
Note: To enable this register to be set, appropriately set the multiplexed pin setting mask register (PMMR) immediately
before setting this register.
Bit Name
Function 1
(Set Value
= H'0)
Function 2
(Set Value
= H'1)
Function 3
(Set Value
= H'2)
Function 4
(Set Value
= H'3)
Function 5
(Set Value
= H'4)
Function 6
(Set Value
= H'5)
Function 7
(Set Value
= H'6)
Others
(Set Value =
H'7 to H'F)
IP15[1:0]
—
—
CAN1_TX_D
— — — — —
IP15[3:2]
—
—
CAN_CLK_C
— — — — —
IP15[5:4]
—
—
CAN1_RX_D
— — — — —
IP15[8:6] —
DU1_DOTCLKIN_C
AUDIO_CLKB_B
PWM5_B
SCIFA3_TXD_C — — —
IP15[11:9] —
TX4_C
SCIFA4_TXD_C
PWM5 VI1_G6_B
SCIFA3_RXD_C
—
—
IP15[14:12] —
RX4_C
SCIFA4_RXD_C
PWM6 VI1_G7_B
SCIFA3_SCK_C
—
—
IP15[17:15] HCTS0#
SCIFB0_CTS#
— — TCLK1
VI1_DATA1_C
— —
IP15[20:18] HRTS0#
SCIFB0_RTS#
— — VI1_DATA2_C
— — —
IP15[23:21] HSCK0
SCIFB0_SCK
—
— CAN_CLK
TCLK2
VI1_DATA3_C
—
IP15[26:24] HRX0
SCIFB0_RXD
—
— CAN0_RX_B
VI1_DATA4_C
— —
IP15[29:27] HTX0
SCIFB0_TXD
— — CAN0_TX_B
VI1_DATA5_C
— —
Legend:
—
Setting
prohibited