Renesas RZ/G1M, Руководство пользователя

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RZ/G1M 5. Pin Function Controller (PFC)
R01UH0626EJ0100 Rev.1.00 5-39
Sep 30,2016
5.3.26 Peripheral Function Select Register 16 (IPSR16)
Function: IPSR16 selects the functions of the multiplexed LSI pins.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
— — — — — — — — — — — — — — — —
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
— — — —
IP16
[11]
IP16
[10]
IP16
[9]
IP16
[8]
IP16
[7]
IP16
[6]
IP16
[5]
IP16
[4]
IP16
[3]
IP16
[2]
IP16
[1]
IP16
[0]
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit Initial Value R/W Description
31 to 0 H'0000 0000 R/W The functions of the LSI pins are selected according to the table below.
Note: To enable this register to be set, appropriately set the multiplexed pin setting mask register (PMMR) immediately
before setting this register.
Bit Name
Function 1
(Set Value
= H'0)
Function 2
(Set Value
= H'1)
Function 3
(Set Value
= H'2)
Function 4
(Set Value
= H'3)
Function 5
(Set Value
= H'4)
Others
(Set Value =
H'5 to H'F)
IP16[2:0] HRX1 SCIFB1_RXD VI1_R0_B — VI1_DATA6_C —
IP16[5:3] HTX1 SCIFB1_TXD VI1_R1_B — VI1_DATA7_C —
IP16[7:6] HSCK1 SCIFB1_SCK — — — —
IP16[9:8] HCTS1# SCIFB1_CTS# — CAN1_TX_B — —
IP16[11:10] HRTS1# SCIFB1_RTS# — CAN1_RX_B — —
Legend:
—
Setting prohibited