QUANTA QSSC-S99K 2U, Руководство пользователя

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Time Sync
In S99K 2U BMC design, BMC do not have a local RTC to know what time it is. Each time when server power on, BIOS
will use Set SEL Time command to initial BMC time. While time smaller than 0x20000000, BMC will default initial it’s
SEL time to 0xFFFFFFFF. Remote console program shall interpret this time as pre-initial.
SEL
BMC supports IPMI 1.5/2.0 standard SEL operation. It can keep to maximum 909 entries SEL log. Event happened in
BIOS side will be logged by using Add SEL Entry command. BMC will store them in NV, the time stamp field will be
filled by BMC. When SEL full, the new SEL won’t be logged but will go through PEF still. If AC power off, all SEL will
remain in NV.
SEL Coherency Issue Between BIOS and BMC
Sensor Type Event Offset
Owner for generating
this event
Meaning
Critical Interrupt
4h. PCI PERR
5h. PCI SERR
BIOS BIOS is responsible for detecting.
Memory 0h. Correctable error BIOS BIOS is responsible for detecting.
Memory 1h. Uncorrectable error BIOS BIOS is responsible for detecting.
POST Error BIOS BIOS is responsible for detecting.
QPI Error BIOS BIOS is responsible for detecting.
PCIE Error BIOS BIOS is responsible for detecting.
Internal Error BIOS BIOS is responsible for detecting.
In the implementation architecture, as long as BIOS detects an event, it should use Add SEL Entry command send this event
to BMC, and BMC will keep this event log in local SEL. So remote console can directly query event log from BMC.
There’s no need for BIOS to keep another SEL and is also forbidden for doing this. For the event message supported in this
platform please refer section System Event Log Format.
SDR
BMC supports IPMI 1.5/2.0 standard SDR operation, refer to SDR Repository Commands for more information. All SDR
records saved into Flash memory. Size of SDR repository is 4KB. For the format of SDR, please refer to section Sensor and
SDR for more information about the SDR detail implementation.
Chapter 4 — BMC
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