A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
B3
B2
B1
B5
B4
B8
B7
B6
USRVCC
B1
0
B9
B1
2
B1
1
B1
4
B1
3
B1
6
B1
5
B1
9
B1
8
B1
7
B2
2
B2
1
B2
0
B2
4
B2
3
B2
6
B2
5
B2
9
B2
8
B2
7
B3
2
B3
1
B3
0
B3
4
B3
3
B3
6
B3
5
F_TDO
D36
D1
B27
F_TDI
B35
D34
D35
D36
D32
D33
D29
D30
D31
D23
D25
D28
D20
D22
D17
D19
D13
D14
D16
D8
D10
D11
D5
D7
D1
D2
D4
D9
D6
D3
D15
D12
D24
D21
D18
D26
D27
A3
A2
A1
A5
A4
A8
A7
A6
A11
A10
A9
A13
A12
A16
A15
A14
A19
A18
A17
A21
A20
A24
A23
A22
A27
A26
A25
A29
A28
A32
A31
A30
A35
A34
A33
USRVCC
A36
A1
F_TMS
F_TCK
B4
C36
2.5VCC
C33
C34
C35
C31
C32
C28
C29
C30
C22
C23
C25
C19
C20
C14
C16
C17
C10
C11
C13
C7
C8
C2
C4
C5
C6
C3
C1
C12
C9
C21
C18
C15
C26
C27
C24
B36
2.5VCC
C36
D2
D36
D1
PCIE3.3VCC
PCIE3.3VCC
PCIE3.3VCC
F_TDI
F_TDO
F_TDI
F_TMS
F_TCK
F_TMS
F_TCK
F_TDO
PCIE3.3VCC
5VCC
PCIE3.3VCC
2.5VCC
PCIE3.3VCC
2.5VCC
USRVCC
A[36:1]
9,13
B[36:1]
10,13
C[36:1]
11,13
D[36:1]
12,13
F_TDO
11
F_TDI
11
F_TMS
11
F_TCK
11
Title
Size
Document Number
Rev
Date:
Sheet
of
<Doc>
000
FPGA Footprint
B
8
15
Wednesday, December 14, 2005
Title
Size
Document Number
Rev
Date:
Sheet
of
<Doc>
000
FPGA Footprint
B
8
15
Wednesday, December 14, 2005
Title
Size
Document Number
Rev
Date:
Sheet
of
<Doc>
000
FPGA Footprint
B
8
15
Wednesday, December 14, 2005
Side B bus
Note this is designed for the Xilinx
XCF01S or XCF02S device in their
V020 package.
Side C bus
Side D bus
Side A bus
USRVCC
The components on this sheet are not
installed by default.
91-0058-000-A
PA72
PA72
R637
0_NP
R637
0_NP
2
4
6
8
10
12
14
1
3
5
7
9
11
13
JP7
JP7
R175
0_NP
R175
0_NP
R634
0_NP
R634
0_NP
R170
100_NP
R170
100_NP
2
4
6
8
10
1
3
5
7
9
JP6
JP6
PA77
PA77
R165
0_NP
R165
0_NP
R633
0_N
P
R633
0_N
P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
FP1
20-pin SSOP, 0.025" pitch
FP1
20-pin SSOP, 0.025" pitch
PA74
PA74
R167
0_NP
R167
0_NP
PA78
PA78
R163
0_NP
R163
0_NP
R156
0_NP
R156
0_NP
C101
0.01uF_NP
C101
0.01uF_NP
C99
0.1uF_NP
C99
0.1uF_NP
PA75
PA75
R151
0_NP
R151
0_NP
R154
0_NP
R154
0_NP
+
C100
10uF_NP
+
C100
10uF_NP
PA76
PA76
R631
0_N
P
R631
0_N
P
R157
0_NP
R157
0_NP
R630
0_NP
R630
0_NP
R173
100_NP
R173
100_NP
R155
0_NP
R155
0_NP
R161
0_NP
R161
0_NP
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
46
46
47
47
48
48
49
49
50
50
51
51
52
52
53
53
54
54
55
55
56
56
57
57
58
58
59
59
60
60
61
61
62
62
63
63
64
64
65
65
66
66
67
67
68
68
69
69
70
70
71
71
72
72
73
73
74
74
75
75
76
76
77
77
78
78
79
79
80
80
81
81
82
82
83
83
84
84
85
85
86
86
87
87
88
88
89
89
90
90
91
91
92
92
93
93
94
94
95
95
96
96
97
97
98
98
99
99
100
100
101
101
102
102
103
103
104
104
105
105
106
106
107
107
108
108
109
109
110
110
111
111
112
112
113
113
114
114
115
115
116
116
117
117
118
118
119
119
120
120
121
121
122
122
123
123
124
124
125
125
126
126
127
127
128
128
129
129
130
130
131
131
132
132
133
133
134
134
135
135
136
136
137
137
138
138
139
139
140
140
141
141
142
142
143
143
144
144
FP2
144 Pin QFP Footprint
FP2
144 Pin QFP Footprint
R164
0_NP
R164
0_NP
R160
0_NP
R160
0_NP
R636
0_NP
R636
0_NP
R166
0_NP
R166
0_NP
R171
0_NP
R171
0_NP
R162
0_NP
R162
0_NP
R159
56_NP
R159
56_NP
R152
0_NP
R152
0_NP
R169
0_NP
R169
0_NP
R632
0_N
P
R632
0_N
P
1
C
TP20
C
TP20
R174
0_NP
R174
0_NP
R635
0_NP
R635
0_NP
R172
100_NP
R172
100_NP
R158
0_NP
R158
0_NP
+
C98
10uF_NP
+
C98
10uF_NP
PA73
PA73
VIN
3
GND
1
VOUT
2
U14
EZ117-2.5
U14
EZ117-2.5
R168
0_NP
R168
0_NP
R153
0_NP
R153
0_NP
Содержание PEX 8311RDK
Страница 1: ...PEX 8311RDK Hardware Reference Manual...
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