PLX Technology PEX 8311RDK, Справочник по аппаратуре

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PEX 8311RDK Hardware Reference Manual, Version 0.90
24 © 2005 PLX Technology, Inc. All rights reserved.
The power supplies for the FPGA’s normally require 2 resistors to be populated. One resistor is used to
link the FPGA to a Vx bus (see the “…Link Resistor” column) and the second resistor is used to select the
appropriate voltage (see the “…voltage R” column.
In addition to the resistors it is recommended that the appropriate decoupling capacitor noted in the
“…Capacitor” column is also assembled. The value required will be FPGA specific but is typically 10nF.
4.4.2.3 Programming the uncommitted FPGA
There are three methods of programming or configuring the uncommitted FPGA:
a) Program through the JTAG interface
b) Program using the PEX 8311 GPIO
c) Program using the Configuration PROM
Of the above options (a) and (b) are available for both the Altera and Xilinx devices. Option (c) is only
available for the Xilinx device.
4.4.2.3.1 Programming the FPGA through the JTAG interface
Table 4-5 shows the resistor options and jumpers used to connect the 0.1”, 1 x 10 header JP6 to an
Altera Cyclone array. JP6 can be used with programmers from Altera such as the ByteBlaster II,
MasterBlaster etc.
Depending on the programmer used pins 4 and 10 of JP6 may need to be pulled to the appropriate
voltage, see notes 1 and 2 below and the appropriate Altera documentation.