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VC7

PCIE3.3VCC

2.5VCC

USRVCC

VC4

VC8

PCIE3.3VCC

2.5VCC

USRVCC

VC5

VC9

VC10

PCIE3.3VCC

2.5VCC

USRVCC

VC6

VC11

PCIE3.3VCC

2.5VCC

USRVCC

VC10

PCIE3.3VCC

2.5VCC

USRVCC

VC11

PCIE3.3VCC

2.5VCC

USRVCC

VC12

PCIE3.3VCC

2.5VCC

USRVCC

VC7

PCIE3.3VCC

2.5VCC

USRVCC

VC8

PCIE3.3VCC

2.5VCC

USRVCC

VC9

VC12

VC1

VC3

VC13

VC10

VC13

VC12

VC11

C10

C11

C12

C13

C14

C15

C16

C17

C18

VC2

VC4

VC5

VC1

VC11

PCIE3.3VCC

C25

C26

C27

C28

2.5VCC

USRVCC

VC13

C29

C30

C31

C32

C33

C34

C35

C36

C21

C22

C23

C19

C20

C24

C17

C18

VC8

VC7

VC5

C16

C17

C18

C27

C28

C29

C30

C20

C27

C28

C29

C30

C36

VC9

C23

VC6

C20

VC2

PCIE3.3VCC

2.5VCC

USRVCC

VC1

VC3

VC4

VC5

PCIE3.3VCC

2.5VCC

USRVCC

VC2

VC6

PCIE3.3VCC

2.5VCC

USRVCC

VC3

1.5VCC

USRVCC

PCIE3.3VCC

2.5VCC

PCIE3.3VCC

2.5VCC

USRVCC

1.5VCC

DP0

3,5

DP1

3,5

F_TCK

F_TMS

DP2

3,5

F_TDO

DP3

3,5

LA30

3,4,5,6

DACK1#

3,4,5,6

BREQi

3,5,6,9

PMEIN#

3,5,12

ADS#

3,4,5,6

BTERM#

3,4,5,6

F_TDI

CCS#

C[36:1]

8,13

BIGEND#

3,5

BLAST#

3,4,5,6

LA31

3,4,5,6

LA29

3,4,5,6

DMPAF/EOT#

3,4,5,6

DREQ0#

3,4,5,6

GPIO2

2,5,10

LD29

3,4,5,6

LD30

3,4,5,6

GPIO3

2,5,9

LD31

3,4,5,6

LA11

3,4,5,10

LA12

3,4,5

LA15

3,4,5,12

LA12

3,4,5

LA13

3,4,5,12

LA14

3,4,5,12

LA22

3,5,12

LA3

3,4,5,12

8,13

C30

8,13

Title

Size

Document Number

Rev

Date:

Sheet

<Doc>

000

FPGA Side C resistor options

Wednesday, December 14, 2005

Title

Size

Document Number

Rev

Date:

Sheet

<Doc>

000

FPGA Side C resistor options

Wednesday, December 14, 2005

Title

Size

Document Number

Rev

Date:

Sheet

<Doc>

000

FPGA Side C resistor options

Wednesday, December 14, 2005

Side C bus

Note LA29=ALE (J Mode),
LA31= DT/R#(J Mode)

Note: LA30=DEN# (J Mode)

The components on this sheet are not
installed by default.

91-0058-000-A

R467

0_NP

R467

0_NP

R484

0_NP

R484

0_NP

R410

0_NP

R410

0_NP

R443

0_NP

R443

0_NP

C128

10nF_NP

C128

10nF_NP

R414

0_NP

R414

0_NP

R476

0_NP

R476

0_NP

C133

10nF_NP

C133

10nF_NP

R408

0_NP

R408

0_NP

R447

0_NP

R447

0_NP

R430

0_NP

R430

0_NP

R466

0_NP

R466

0_NP

R448

0_NP

R448

0_NP

R461

0_NP

R461

0_NP

R392

0_NP

R392

0_NP

R418

0_NP

R418

0_NP

R422

0_NP

R422

0_NP

R381

0_NP

R381

0_NP

R389

0_NP

R389

0_NP

R438

0_NP

R438

0_NP

R439

0_NP

R439

0_NP

R478

0_NP

R478

0_NP

R454

0_NP

R454

0_NP

R441

0_NP

R441

0_NP

R442

0_NP

R442

0_NP

R398

0_NP

R398

0_NP

C129

10nF_NP

C129

10nF_NP

R396

0_NP

R396

0_NP

R460

0_NP

R460

0_NP

C134

10nF_NP

C134

10nF_NP

R468

0_NP

R468

0_NP

C138

10nF_NP

C138

10nF_NP

R383

0_NP

R383

0_NP

R421

0_NP

R421

0_NP

R405

0_NP

R405

0_NP

R429

0_NP

R429

0_NP

R420

0_NP

R420

0_NP

R459

0_NP

R459

0_NP

R385

0_NP

R385

0_NP

R394

0_NP

R394

0_NP

R450

0_NP

R450

0_NP

R475

0_NP

R475

0_NP

R471

0_NP

R471

0_NP

R487

0_NP

R487

0_NP

R402

0_NP

R402

0_NP

R416

0_NP

R416

0_NP

R395

0_NP

R395

0_NP

R440

0_NP

R440

0_NP

R411

0_NP

R411

0_NP

R428

0_NP

R428

0_NP

R424

0_NP

R424

0_NP

R400

0_NP

R400

0_NP

R465

0_NP

R465

0_NP

R409

0_NP

R409

0_NP

R431

0_NP

R431

0_NP

R473

0_NP

R473

0_NP

C130

10nF_NP

C130

10nF_NP

R458

0_NP

R458

0_NP

R479

0_NP

R479

0_NP

R486

0_NP

R486

0_NP

R446

0_NP

R446

0_NP

C132

10nF_NP

C132

10nF_NP

R457

0_NP

R457

0_NP

R463

0_NP

R463

0_NP

R464

0_NP

R464

0_NP

R449

0_NP

R449

0_NP

R387

0_NP

R387

0_NP

R470

0_NP

R470

0_NP

R483

0_NP

R483

0_NP

C135

10nF_NP

C135

10nF_NP

R412

0_NP

R412

0_NP

R417

0_NP

R417

0_NP

R390

0_NP

R390

0_NP

R452

0_NP

R452

0_NP

R413

0_NP

R413

0_NP

R433

0_NP

R433

0_NP

R472

0_NP

R472

0_NP

R453

0_NP

R453

0_NP

R434

0_NP

R434

0_NP

R455

0_NP

R455

0_NP

R401

0_NP

R401

0_NP

R393

0_NP

R393

0_NP

R423

0_NP

R423

0_NP

R427

0_NP

R427

0_NP

C140

10nF_NP

C140

10nF_NP

R462

0_NP

R462

0_NP

R382

0_NP

R382

0_NP

R415

0_NP

R415

0_NP

R435

0_NP

R435

0_NP

R436

0_NP

R436

0_NP

R481

0_NP

R481

0_NP

R391

0_NP

R391

0_NP

R444

0_NP

R444

0_NP

R445

0_NP

R445

0_NP

R469

0_NP

R469

0_NP

R485

0_NP

R485

0_NP

R399

0_NP

R399

0_NP

R451

0_NP

R451

0_NP

R388

0_NP

R388

0_NP

R474

0_NP

R474

0_NP

C137

10nF_NP

C137

10nF_NP

C131

10nF_NP

C131

10nF_NP

R384

0_NP

R384

0_NP

R386

0_NP

R386

0_NP

R426

0_NP

R426

0_NP

R437

0_NP

R437

0_NP

R407

0_NP

R407

0_NP

R425

0_NP

R425

0_NP

R406

0_NP

R406

0_NP

R397

0_NP

R397

0_NP

R419

0_NP

R419

0_NP

R456

0_NP

R456

0_NP

R404

0_NP

R404

0_NP

R480

0_NP

R480

0_NP

C139

10nF_NP

C139

10nF_NP

R403

0_NP

R403

0_NP

R477

0_NP

R477

0_NP

C136

10nF_NP

C136

10nF_NP

R432

0_NP

R432

0_NP

R482

0_NP

R482

0_NP

Содержание PEX 8311RDK

Страница 1: ...PEX 8311RDK Hardware Reference Manual...

Страница 2: ......

Страница 3: ...PEX 8311RDK Hardware Reference Manual Version 0 90 December 2005 Website http www plxtech com Support http www plxtech com support Phone 408 774 9060 800 759 3735 Fax 408 774 2169...

Страница 4: ...s to this publication known as errata PLX assumes no liability whatsoever including infringement of any patent or copyright for sale and use of PLX products PLX Technology and the PLX logo are registe...

Страница 5: ...oint Root Complex operation 13 4 Mechanical Architecture 15 4 1 Monitoring Points Test headers Indicators Control and DIP Switch Summary 16 4 1 1 Monitoring Points 16 4 1 2 Headers 16 4 1 2 1 Test Hea...

Страница 6: ...r Local Bus Memory Map 10 Table 3 4 PEX 8311RDK LED Indicators 11 Table 3 5 PEX 8311RDK Power supply currents 12 Table 3 6 PEX 8311RDK Power jumper and resistor options 12 Table 4 1 PEX 8311RDK Defaul...

Страница 7: ...hout notice Although every effort has been made to ensure the accuracy of this manual PLX shall not be liable for any errors incidental or consequential damages in connection with the furnishing perfo...

Страница 8: ......

Страница 9: ...bus J mode applications The RDK provides 5 surface mount QFP SOIC SSOP footprints and for hardware designers to easily add processors DSPs ASICs FPGAs memory and I O devices to test simulate and debu...

Страница 10: ...ace 8 KB general purpose shared RAM 1 2 PEX 8311RDK Features PLX PCI Express to PCI bridge device in a 21 x 21 mm 337 ball PBGA package Single x1 PCI Express Edge connector for insertion into standard...

Страница 11: ...between a PCI Express base board and local bus processors or logic The PEX 8311RDK is designed to showcase many of the PEX 8311 features when operating in Endpoint mode The PEX 8311RDK s form factor...

Страница 12: ...l Clock Figure 3 1 PEX 8311RDK Hardware Architecture 3 1 PEX 8311 PCI Express Bridge Device The PEX 8311 U1 is a high performance PCI Express to local bus device that enables designers to migrate lega...

Страница 13: ...Hz and can directly interface with the PEX 8311 The Atmel AT25640 device as used in the PEX 8311RDK is recommended Other compatible 128 byte serial EEPROM s include the Atmel AT25010A Catalyst CAT25C0...

Страница 14: ...7 0 22h 8500 Local Miscellaneous Control Register 1 Processor Local Bus Big Little Endian Descriptor Register LMISC1 7 0 BIGEND 7 0 24h 0000 MSW of Range for PCI to Local Expansion ROM EROMRR 31 16 26...

Страница 15: ...R Bridge Support Extensions the LSB is reserved PMDATA 7 0 PMCSR_BSE 7 0 62h 0000 Power Management Control Status Bits 15 7 2 and 1 0 are reserved PMCSR 15 0 3 3 Local and PCI Express Hardware Element...

Страница 16: ...resses to the SBSRAM The SBSRAM controller also generates the active low ready signal READY to terminate normal PEX 8311 memory cycles and also generates the active low BTERM input to the PEX 8311 to...

Страница 17: ...Configuration for details on re configuring the RDK hardware for J Mode operation It can be used for expansion and prototyping Both either a master and or slave devices may be connected to this conne...

Страница 18: ...k PCI Express RefClk enters the PEX 8311RDK through the PCI Express card edge male connector RefClk is laid out as a 100 Ohm controlled impedance microstrip differential pair Trace length mismatch is...

Страница 19: ...r Indication LED8 2 5V power is on GPIO0 LED1 Output OFF 0 Link Down ON 1 Link Up GPIO1 LED2 ON GPIO1 Input by default GPIO2 LED3 ON GPIO2 Input by default GPIO3 LED4 ON GPIO3 Input by default 3 6 PEX...

Страница 20: ...ns Various power jumpers and resistor options are available on the PEX 8311 RDK to allow the power consumption of the PEX 8311 to be measured under different operating conditions Table 3 6 details the...

Страница 21: ...nt Mode 3 7 1 Wakeup The PEX 8311 asserts the WAKEOUT signal or sends a PCI Express beacon for the following PMEIN pin is asserted while link is in L2 state PCI Express beacon is received while link i...

Страница 22: ...12V to the 3 3V regulator U4 by removing R21 and populating R22 with a 0 ohm jumper The PCIE3 3VCC can then be provided by U4 by populating R27 with a 0 ohm jumper Extreme care must be taken to ensur...

Страница 23: ...n the PCI Express CEM specification The board is an eight layer 6 6 L x 8 15 W PC board The board height is greater than that noted in the PCI Express CEM specification and care must be taken to ensur...

Страница 24: ...ng or prototype area extension All PEX 8311 Local Bus signals configuration and status signals are well arranged within these headers Headers LAH2 and LAH3 contain Local Bus address signals Headers LA...

Страница 25: ...closed JP2 OPEN GPIO0 drives LED1 JP3 1 2 Pull GPIO1 high JP4 1 2 Pull GPIO2 high JP5 1 2 Pull GPIO3 high J7 CLOSED 3 3V supply to PEX 8311 J8 CLOSED 1 5V supply to PEX 8311 J9 CLOSED 2 5V supply to P...

Страница 26: ...5 Ohms 10 single ended impedance and 100 Ohms 5 differential Figure 4 3 details the layers used in the PCB manufactuer The thickness of the various layers is detailed in Table 4 2 Layer thickness SOLD...

Страница 27: ...shroud themselves PLX takes no responsibility for boards damaged during this operation 4 4 Prototyping Area The RDK board contains a small prototyping area with various surface mount footprints and a...

Страница 28: ...does not provide FPGA code examples Section 7 CPLD Verilog Code details the code which is used in the on board CPLD and this may be used as a guide 4 4 2 1 Uncommitted FPGA connections The following m...

Страница 29: ...244 NC 18 IP GND A18 User IP 249 235 19 GND GND A19 178 235 178 235 20 I O nCEO USERi A20 User IO Note 2 21 I O nCE LA6_X A21 183 Note 2 22 I O MSEL0 LA7_X A22 187 Note 2 23 I O MSEL1 LA8_X A23 192 No...

Страница 30: ...69 IP I O DACK0 B33 339 339 70 I O I O LD28 B34 342 342 71 CCLK I O Note 1 B35 345 User IO 72 DONE I O Note 1 B36 347 User IO 73 GND I O LA11_A C1 387 384 386 74 I O I O LD29 C2 391 391 75 I O I O LD3...

Страница 31: ...LK8 I O LCLK_T D20 496 User IO 129 IP I O D21 User IP User IO 130 I O I O LW R D22 505 505 131 I O I O LD14 D23 508 508 132 I O I O READY D24 511 511 133 GND I O LA28_A D25 518 615 516 134 I O I O WAI...

Страница 32: ...e uncommitted FPGA There are three methods of programming or configuring the uncommitted FPGA a Program through the JTAG interface b Program using the PEX 8311 GPIO c Program using the Configuration P...

Страница 33: ...in header R197 0 DCLK 24 5 7 JP3 2 3 Notes 1 This pin is connected to TP20 Connect this pin to the same supply voltage as the download cable 2 For some programmers it may be necessary to tie this pin...

Страница 34: ...GA signal pin Pull up resistor or jumper Pull down resistor or jumper JP7 2 Vref 2 5V JP7 4 F_TMS R172 100 1 TMS 108 JP7 6 F_TCK R170 100 1 TCK 110 JP7 8 F_TDO R171 0 1 TDO 109 JP7 10 F_TDI R173 100 1...

Страница 35: ...4 and add R264 3 GPIO1 must be configured to be an output In addition to the above resistors the appropriate power supply and ground resistors must also be populated Table 4 8 shows the resistor optio...

Страница 36: ...Configuration PROMs FP1 is designed to accept the VO20 VOG20 packaged versions of the XCFxxS platform flash PROMs Table 4 9 details the resistor configurations required to interface a platform flash...

Страница 37: ...programming mode or resetting the device 3 R348 and R353 are only required if BitGen option DriveDONE No see the appropriate Xilinx data sheet for more details Ideally pin 3 or pin 6 of RN10 should be...

Страница 38: ...n C mode using a 32 bit data bus In addition every feature of the PEX 8311 is connected to the FPGA For some applications more FPGA I O will be required for user circuitry attached to the FPGA There a...

Страница 39: ...o X means removed Table 5 1 RDK Board Mode Configuration Resistors Value C Mode Default J Mode Mode Pins Configuration R32 1 10w 10K ohm 5 X R33 1 10w 10K ohm 5 R34 1 10w 0 ohm 5 X R35 1 10w 0 ohm 5 X...

Страница 40: ......

Страница 41: ...in the PC s main memory For example assume the HBuf has physical address starting at 01F80000h b Enter 8 long words of test data to the SBSRAM For example el s0 11111111 el s0 4 22222222 el s0 8 3333...

Страница 42: ...ogy Inc All rights reserved h Change the direction of the DMA transfer to PCI to Local for DMA CH0 by modifying the Descriptor Pointer 90h value from 8 to 0 i Click the Start Transfer button to perfor...

Страница 43: ...mcsn sramoen lholda lbg sram_adds sram_bwn csn input clk adsn blastn lwdrdn lhold input 1 0 lbr input 3 0 lben input 9 2 adds_in input 31 28 adds_4msb output readyn btermn sramcsn sramoen lholda outpu...

Страница 44: ...s posedge clk if adsn adds_4msb 4 b0000 a31_28 3 0 adds_4msb 31 28 SRAM control state machine parameter s0 2 b00 s1 2 b01 s2 2 b10 s3 2 b11 always posedge clk casex state s0 begin sramoen 1 oeb b1 if...

Страница 45: ...moen 1 sramcsn 0 oer b0 oeb b1 state s1 end end else begin sram_adds 9 2 sram_adds 9 2 1 sramoen 0 sramcsn 0 oer b0 oeb b1 state s2 end s2 if lwdrdn blastn begin sramoen 1 sramcsn 1 oer b1 oeb b1 stat...

Страница 46: ...LX Technology Inc All rights reserved sramcsn 1 oer b1 oeb b1 state s0 end default state s0 endcase always posedge clk begin if lhold lholda lhold else lholda 0 if lhold lbr 1 lbg 1 lbr 1 else lbg 1 0...

Страница 47: ...vale CA 94085 USA Tel 408 774 9060 Tel 800 759 3735 Fax 408 774 2169 http www plxtech com PEX 8311 Data Book Version xx or higher PEX 8311RDK Hardware Reference Manual PCI Special Interest Group PCI S...

Страница 48: ......

Страница 49: ...21VRC TR8 LED SMT Red 0805 LED1 LED2 LED3 LED4 10 3 Chicago CMD17 21VGC TR8 LED SMT Green 0805 LED5 LED6 LED8 11 1 Steward L10805E400R Ferrite chip 47 uH 500mA 0805 L1 12 1 CTS Corp 742C083271JTR Resi...

Страница 50: ...U10 31 1 Samsung K7B403625B IC Synchronous SRAM 4 Mbit 128Kx36 Flow Through TQFP 100 pins 14x20 mm U11 THROUGH HOLE COMPONENTS 32 4 Molex 22 28 4020 Header 2 x 1 pins 0 1 vert no shroud Thru Hole JP1...

Страница 51: ...k EP1345HSPD 66 666M 54 1 Mil Max 110 93 308 41 001 Socket 8 pin dip 0 3 solder tail low profile Thru Hole U13 55 1 Panasonic ERJ3GEYJ100V Resistor 10 ohms 5 0 1 W 0603 R136 NIC Components NRC06J100TR...

Страница 52: ...ithout notice Products may have minor variations to this publication known as errata PLX assumes no liability whatsoever including infringement of any patent or copyright for sale and use of PLX produ...

Страница 53: ...e 1 2 C15 0 1uF C15 0 1uF 1 2 3 JP3 JP3 C34 10uF C34 10uF WAKEIN B2 ROOT_COMPLEX A18 PLXT2 A10 EERDDATA M3 TEST N1 BUNRI F3 BTON D10 SMC V4 TMC E2 TMC1 V3 TMC2 E3 TDI A14 TCK A13 TMS A11 TRST B14 WAKE...

Страница 54: ...5 6 7 8 RN2 742 08 3 103 J XX RN2 742 08 3 103 J XX C45 0 1uF C45 0 1uF R34 0 R34 0 R41 1K R41 1K C59 0 1uF C59 0 1uF R45 10K R45 10K R33 10K_NP R33 10K_NP 1 2 3 4 5 6 7 8 RN6 742 08 3 103 J XX RN6 7...

Страница 55: ...PA56 PA56 PA12 PA12 PA31 PA31 C87 0 1uF C87 0 1uF R108 0 R108 0 C89 0 01uF C89 0 01uF PA50 PA50 PA6 PA6 PA17 PA17 PA39 PA39 R74 0 R74 0 R92 10K R92 10K SA0 37 SA1 36 DQa0 52 DQa1 53 DQa2 56 DQa3 57 D...

Страница 56: ...Size Document Number Rev Date Sheet of 000 Test Headers PLX TECHNOLOGY INC 870 Maude Ave Sunnyvale CA 94085 Custom 5 15 Wednesday December 14 2005 www plxtech com Title Size Document Number Rev Date S...

Страница 57: ...stom 6 15 Wednesday December 14 2005 www plxtech com Title Size Document Number Rev Date Sheet of 000 PLX Option Module Connector PLX TECHNOLOGY INC 870 Maude Ave Sunnyvale CA 94085 Custom 6 15 Wednes...

Страница 58: ...ND 38 RX6 40 RX6 42 GND 44 RX7 46 RX7 48 GND 5 TX1 7 TX1 9 GND 11 TX2 13 TX2 15 GND 17 TX3 19 TX3 21 GND 23 TX4 25 TX4 27 GND 29 TX5 31 TX5 33 GND 35 TX6 37 TX6 39 GND 41 TX7 43 TX7 45 GND 47 J5 Midbu...

Страница 59: ...12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 FP1 20 pin SSOP 0 025 pitch FP1 20 pin SSOP 0 025 pitch PA74 PA74 R167 0_NP R167 0_NP PA78 PA78 R163 0_NP R163 0_NP R156 0_NP R156 0_NP C101 0 01...

Страница 60: ...266 0_NP R266 0_NP C112 10nF_NP C112 10nF_NP R180 56_NP R180 56_NP R233 0_NP R233 0_NP R187 0_NP R187 0_NP R272 0_NP R272 0_NP R246 0_NP R246 0_NP R217 0_NP R217 0_NP C106 10nF_NP C106 10nF_NP R201 0_...

Страница 61: ...57 0_NP R357 0_NP R343 0_NP R343 0_NP R375 0_NP R375 0_NP R273 0_NP R273 0_NP R292 0_NP R292 0_NP R376 0_NP R376 0_NP R365 0_NP R365 0_NP R296 0_NP R296 0_NP R315 0_NP R315 0_NP R350 0_NP R350 0_NP C1...

Страница 62: ...0_NP R461 0_NP R461 0_NP R392 0_NP R392 0_NP R418 0_NP R418 0_NP R422 0_NP R422 0_NP R381 0_NP R381 0_NP R389 0_NP R389 0_NP R438 0_NP R438 0_NP R439 0_NP R439 0_NP R478 0_NP R478 0_NP R454 0_NP R454...

Страница 63: ...F_NP C148 10nF_NP C141 10nF_NP C141 10nF_NP R535 0_NP R535 0_NP R534 0_NP R534 0_NP R489 0_NP R489 0_NP R609 0_NP R609 0_NP R550 0_NP R550 0_NP R569 0_NP R569 0_NP R617 0_NP R617 0_NP R501 0_NP R501 0...

Страница 64: ...PF117 PF132 PF132 PF7 PF7 PF42 PF42 PF76 PF76 PF120 PF120 PF33 PF33 PF68 PF68 PF102 PF102 PF10 PF10 PF45 PF45 PF80 PF80 PF124 PF124 PF20 PF20 PF72 PF72 PF106 PF106 PF107 PF107 PF127 PF127 PF48 PF48 P...

Страница 65: ...F180 PF155 PF155 PF152 PF152 PF218 PF218 PF176 PF176 PF205 PF205 PF230 PF230 PF245 PF245 PF177 PF177 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20...

Страница 66: ...15 15 Wednesday December 14 2005 91 0058 000 A N C T1 N C P1 N C W6 N C B12 N C B11 N C C11 N C B13 N C C8 N C B7 N C B9 N C R2 N C N3 N C M2 N C P3 N C V8 N C N2 N C T2 N C P2 N C N4 N C V7 N C R1 N...

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