
The Calibrator sends the serial poll status byte (STB) when it
responds to a serial poll. This byte is cleared (set to 0) when the
power is turned on. The STB byte structure is shown in Figure 34.
Refer to the *STB? command in section 10 for more information on
reading this register.
7
6
5
4
3
2
1
0
0
RQS
ESB
MAV
EAV
0
0
0
MSS
RQS
Requesting service. The RQS bit is set to 1 whenever bits ESB,
MAV, EAV, or ISCB change from 0 to 1 and are enabled (1) in
the SRE. When RQS is 1, the CL3001 asserts the SRQ control
line on the IEEE-488 interface. You can do a serial poll to read
this bit to see if the CL3001 is the source of an SRQ.
MSS
Master summary status. Set to 1 whenever bits ESB, MAV, EAV,
or ISCB are 1 and enabled (1) in the SRE. This bit can be read
using the *STB? Remote command in place of doing a serial
poll.
ESB
Set to 1 when one or more ESR bits are 1.
MAV
Message available. The MAV bit is set to 1 whenever data is
available in the CL3001's IEEE-488 interface output buffer.
EAV
Error available. An error has occurred and an error is available
to be read from the error queue by using the FAULT? query.
Figure 34 - Serial Poll Status Byte (STB) and Service Request
Enable (SRE) Registers
2) Service Request (SRQ) Line
IEEE-488 Service Request (SRQ) is an IEEE-488.1 bus control
line that the CL3001 asserts to notify the controller that it requires
some type of service. Many instruments can be on the bus, but
they all share a single SRQ line. To determine which instrument
set SRQ, the Controller normally does a serial poll of each
instrument. The calibrator asserts SRQ whenever the RQS bit in
its Serial Poll Status Byte is 1. This bit informs the controller that
the CL3001 was the source of the SRQ.
The CL3001 clears SRQ and RQS whenever the controller/host
performs a serial poll, sends *CLS, or whenever the MSS bit is
cleared. The MSS bit is cleared only when ESB and MAV are 0,
or they are disabled by their associated enable bits in the SRE
register being set to 0.
3) Service Request Enable Register (SRE)
The Service Request Enable Register (SRE) enables or masks
the bits of the Serial Poll Status Byte. The SRE is cleared at
power up. Refer to Figure 34 for the bit functions.
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