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41
CHAPTER 3 CPU ARCHITECTURE
3.1 Memory Spaces
The
µ
PD780973 Subseries can access a 64-Kbyte memory space. Figures 3-1 and 3-2 show memory maps of
the respective devices.
Figure 3-1. Memory Map (
µ
PD780973(A))
0000H
Data memory
space
General Registers
32
×
8 bits
Internal ROM
24576
×
8 bits
5FFFH
1000H
0FFFH
0800H
07FFH
0080H
007FH
0040H
003FH
0000H
CALLF Entry Area
CALLT Table Area
Vector Table Area
Program Area
Program Area
LCD Display RAM
20
×
4 bits
Reserved
Program
memory
space
6000H
5FFFH
FA59H
FA58H
FA6DH
FA6CH
FEE0H
FEDFH
FF00H
FEFFH
FFFFH
Internal High-speed RAM
768
×
8 bits
Special Function
Registers (SFRs)
256
×
8 bits
Reserved
FC00H
FBFFH
Reserved
EEPROM
256
×
8 bits
FA00H
F9FFH
F900H
F8FFH
Содержание mPD780973 Series
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