193
CHAPTER 16 LCD CONTROLLER/DRIVER
(2) LCD display control register (LCDC)
This register sets cutoff of the current flowing to split resistors for LCD drive voltage generation and switchover
between segment output and input/output port functions.
LCDC is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input clears LCDC to 00H.
Figure 16-4. LCD Display Control Register (LCDC) Format
Address: FFB2H After Reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
LCDC
LCDC7
LCDC6
LCDC5
LCDC4
0
0
0
LIPS
LCDC7
LCDC6
LCDC5
LCDC4
P81/S19 to P97/S5 Pin Functions
Port Pins
Segment Pins
0
0
0
0
P81 to P97
None
0
0
0
1
P81 to P95
S5 to S6
0
0
1
0
P81 to P93
S5 to S8
0
0
1
1
P81 to P91
S5 to S10
0
1
0
0
P81 to P87
S5 to S12
0
1
0
1
P81 to P85
S5 to S14
0
1
1
0
P81 to P83
S5 to S16
0
1
1
1
P81
S5 to S18
1
0
0
0
None
S5 to S19
Other than above
Setting prohibited
LIPS
LCD Driving Power Supply Selection
0
Does not supply power to LCD.
1
Supplies power to LCD from V
DD
pin.
Cautions 1. Pins which perform segment output cannot be used as output port pins even if 0 is
set in the port mode register.
2. If a pin which performs segment output is read as a port, its value will be 0.
Содержание mPD780973 Series
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