CHAPTER 19 FLASH MEMORY
User’s Manual U17446EJ3V1UD
308
Figure 19-26. Example of Internal Verify 2 Operation in Self Programming Mode
<11> Normal termination
<7> Clear & restart WDT counter
(WDTE = ACH)
Note
<9> Check execution result
(VCERR and WEPRERR flags)
<8> Execute HALT instruction
Normal
Abnormal
<6> Clear PFS
<1> Set internal verify 2
command (FLCMD = 02H)
Internal verify 2
<10> Abnormal termination
<2> Set block no. for
internal verify, to FLAPH
<4> Set the same value as
that of FLAPH to FLAPHC
<5>
Sets FLAPLC to the end address
<3> Sets FLAPL to the start address
Note
This setting is not required when the watchdog timer is not used.
Remark
<1> to <11> in Figure 19-26 correspond to <1> to <11> of internal verify 2 in
19.8.9
(the page before
last).
<R>
Содержание 78K0S/KB1+
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