NEC 78K0S/KB1+, Руководство пользователя

Страница: 315 / 406

CHAPTER 19 FLASH MEMORY
User’s Manual U17446EJ3V1UD
315
INCW DE ; Address at which data is to be w 1
BR FlashWriteLoop
FlashVerify:
MOVW HL,#WriteAdr ; Sets verify address
MOV FLCMD,#02H ; Sets flash control command (internal verify 2)
MOV A,H
MOV FLAPH,A ; Sets verify start address
MOV A,L
MOV FLAPL,A ; Sets verify start address
MOV A,D
MOV FLAPHC,A ; Sets verify end address
MOV A,E
MOV FLAPLC,A ; Sets verify end address
MOV WDTE,#0ACH ; Clears & restarts WDT
HALT ; Self programming is started
MOV A,PFS
CMP A,#00H
BNZ $StatusError ; Checks internal verify error
; Performs abnormal termination processing when an error
; occurs
MOV FLCMD,#00H ; Clears FLCMD register
ModeOffLoop:
MOV PFS,#00H ; Clears flash status register
MOV PFCMD,#0A5H ; PFCMD register control
MOV FLPMC,#00H ; FLPMC register control (sets value)
MOV FLPMC,#0FFH ; FLPMC register control (inverts set value)
MOV FLPMC,#00H ; Sets normal mode via FLPMC register control (sets value)
BT PFS.0,$ModeOffLoop ; Checks completion of write to specific registers
; Repeats the same processing when an error occurs
; Restore the CPU clock to its setting before the self
; programming, after normal completion of the specific
; sequence
MOV MK0,#INT_MK0 ; Restores interrupt mask flag
MOV MK1,#INT_MK1
EI
BR StatusNormal
;---------------------------------------------------------------------
;END (abnormal termination processing); Perform processing to shift to
normal mode in order to return to normal processing
<R>
<R>
<R>