SEL-1FS1/SEL-2FS1 and SEL-1XD1/SEL-2XD1
Installation and Operation Manual
Installation, Operation, and Specifications
© 2015 Imagine Communications Corp.
Proprietary and Confidential.
Version 2.8 | Page 65
Timecode
The FS1 and XD1 support the following types of timecode:
•
D-VITC in SD formats (SMPTE-266M)
•
ATC in SD formats (SMPTE-12M-2, formerly RP-188)
•
ATC in HD formats (SMPTE-12M-2, formerly RP-188)
•
RP196 VITC (RP-196)
•
RP196 LTC (RP-196)
The FS1 provides passthrough for timecode; the XD1 supports ancillary timecode insertion to video
output, extraction from video input, and conversion between D-VITC and ATC.
The parameters
ATC (VITC) Present
,
ATC (LTC) Present
,
D-VITC Present, RP196 VITC Present
and
RP 196
LTC Present
in
Data DMB x
> Timecode
indicate the presence of different types of input timecode. In
Data DMB x,
use the
Timecode Input Select
parameter to select which detected timecode gets passed
to the video output. To translate the input timecode to a specific output timecode, use the
Timecode
Output Select
parameter.
Note
: Since RP196 timecode is embedded in the HANC space (as well as ATC timecode if chosen to
embed in HANC), enabling ADS clean in
Audio > Embedding
>
Embedding x > Control
will remove all
packets in the entire HANC space of the corresponding processing channel. In the XD1 (when in proc
bypass mode) and in the FS1 module, this will strip out all HANC timecode packets. The XD1 is not
affected by this limitation when it is in conversion mode, since timecode packets are re-embedded to
the video after the conversion.
If HANC timecode is to be preserved in proc bypass mode, set the
Emb x ADS Clean
control to
No
, and
the
Emb x Group x Embedding Mode
to
OverWrite
. This will produce the same result as if ADS Clean
is
enabled.
ARC Code Advanced
Most of the ARC code de-embedding, processing and embedding control can be found at the following
locations:
•
XD1:
Video > Processing Channel
x
> Conversion > Advanced Video
Processing x
•
FS1:
Video > Processing Channel x > AFD-VI-WSS Processing
The controls related to WSS, VI de-embedding line and WSS, VI and AFD embedding line are located at
Data DMB x > ARC Code Advanced and Data EMB x > ARC Code Advanced.
Brandnet
For XD1 modules, Brandnet transcoding is supported in 525, 720p59 and 1080i59 standards.