Holtek HT-IDE, Руководство пользователя

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be outputs and clears the high and low order bytes. In (3) the control bits
are initially set as follows BUSY=0, ACK=1, OE=0, WR=1 by placing these
values on Port C. ACC is then cleared and the program waits for an
interrupt to appear. Only when an interrupt occurs will the value of ACC
change (4). After an interrupt occurs, the program will jump to the inter-
rupt service routine, and the control lines on port C change to the following:
BUSY=1, ACK=1, OE=1, WR=1. Pin 1 of the printer port STROBE is
connected to the external interrupt input INT. So only when a STROBE
occurs will the interrupt service routine be run. Before the next STROBE
occurs it is necessary to check the condition of the BUSY signal. So all the
data transfer must have been completed.
The Printer Port’s STROBE signal indicates that there is data ready to be
transmitted. In (5) Ports A and B are first setup as outputs and in part (6)
the data is placed on these two ports, the low order byte on A and the high
order byte on B. The address is then increased by one. At the same time the
STROBE signal is setup. After the 74HC374 receives a clock signal the data
on pins 2~9 of the printer port will appear on the output pins of the
74HC374. After this the program will activate the WR line (7) to write the
data into the SRAM and after a time delay (8) will return to its original
inactive value. After this the ACK line is activated (9) to confirm the data
transfer and again after a short time delay it returns to its original inactive
state. At this point the write cycle is complete. The BUSY signal is now
returned to its inactive state (11) permitting further data to be written.
When the STROBE signal is received the timer/counter starts counting
(10).
At this time the ACC is checked to see if it is zero. Two different events will
allow the program to jump out of the program loop (4), these are an external
interrupt or an interrupt created by the timer/counter. These two inter-
rupts will affect ACC in different ways. This can be detected by looking at
ACC bit 3, as shown in (12). Whether it is an external interrupt or an
interrupt due to the timer/counter, both indicate that the data transfer is
complete. After this an OE signal will be generated indicating that the
SRAM data is valid and available for use by the hardware. The next action
is to return Ports A and B from their original condition as output ports to
input ports (13). Care has to be taken here to avoid conflicts between the
microcontroller address bus and the system bus, which is connected to the
same lines. For this reason Ports A and B must be defined as inputs to place
them in a high impedance state before the system takes control of the
address lines.
HT-IDE User’s Guide
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