Harris DX 25U, Техническое руководство

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Delay output are both LOW, both AND gate inputs are LOW,
and U20-3 is LOW. When the Overdrive Inhibit is released (goes
HIGH), U20-1 goes HIGH but U20-2 remains LOW for an
additional 20 seconds because of the delay circuit. When the
delay circuit output goes HIGH, gate U20-3 goes HIGH and Air
Interlock Fault sensing is enabled.
When both inputs to U63-3 are HIGH, the “AIR” LED on the
ColorStat™ panel is enabled through U62-8/11.
Q.5.2.4
PA Power Supply Protection Circuit
The PA Power Supply protection circuit protects three phase
transformer T1 against a phase imbalance. Causes of trans-
former phase imbalance include a high or low phase voltage or
loss of one phase.
Normally, the 12-phase power supply has a ripple frequency 12
times the power line frequency (that is, 600 Hz or 720 Hz). A
phase imbalance causes a ripple component at two times the line
frequency (100 Hz or 120 Hz). The input to the Power Supply
Protection circuit is a sample of the +115 VDC supply ripple,
from Fuse Board A24. The protection circuit includes a band-
pass filter to detect 100 to 120 Hz, a peak detector, a comparator,
and a delay circuit. The “delay” circuit prevents transient con-
ditions from generating faults.
The Power Supply Protection circuit is shown on sheet 1 of the LED
Board schematic diagram, 839-7855-184, at the top of the page, and
includes three sections of both U1 and U27, U43, U14-4, U21-10/12,
and U20-8.
Q.5.2.4.1
“PA Power Supply Ripple” Sample
On the LED Board, U1-14/8/7 make up a three-section active
filter with a pass-band from approximately 95Hz to 126Hz.
“Power Supply Protection Sensitivity” adjustment R86 adjusts
the gain of non-inverting amplifier stage U27-14.
The input to U27-10, at test point TP9, is a power supply ripple
sample, and the output, at test point TP10, is a DC sample of the
peak input voltage.
A voltage divider, R135-R141, sets the reference voltage at the
inverting input of U43 and is measured at TP11. If the ripple
component increases sufficiently, the signal input at the non-in-
verting input becomes greater than the reference voltage and the
output of U43-7 will go to logic HIGH.
Q.5.2.4.2
Delay Circuit
When a FAULT is detected, the output of U43 goes HIGH and
forces U20-9 HIGH. A delay circuit consisting of R103, C76,
U21-10/12 prevent the other input, U20-10, from going HIGH
for approximately 1.5 seconds. This delay prevents transient
conditions on the power line from causing “fault” outputs.
Q.5.2.5
PA Power Supply “Overvoltage” Circuit
The PA Power Supply Overvoltage sensing circuit is shown on
Sheet 4 of the LED Board schematic diagram (at grid locations
B6-B8). A voltage divider on Fuse Board A24 provides a sample
of the +230 VDC supply to the non-inverting input of voltage
comparator U1-1 on the LED Board. The inverting input of the
comparator is a fixed reference voltage derived from the +15
VDC regulated supply.
Normally, the sample is lower than the reference voltage, and
the comparator output goes to -15 VDC. Diode CR3 clamps the
voltage to the input of Logic Level Down Converter U14-3. The
down converter output is a TTL level logic LOW signal to “Main
Power Supply: Over Voltage” status indicator circuit.
If the supply voltage exceeds the preset threshold, the output of
comparator U1A goes to +15 VDC, then is converted to a TTL
level logic HIGH signal by U14-2. The logic HIGH input to the
status indicator latch circuit (U34-9 and U35-11) causes a
Latched RED “Fault” indication on the ColorStat™ panel until
the latch is reset.
Q.5.2.6
“Cable Interlock” Circuit
The “Cable Interlock” circuit indicates a fault when:
a. An RF amplifier module is missing or not fully inserted
into the motherboard.
b. Cables between the Modulation Encoder and Com-
biner/Motherboards are disconnected or loose.
c. Cables between the DC Regulator and Modulation En-
coders are disconnected or loose.
d. The cable between the Modulation Encoder and LED
Board is disconnected or loose.
The “Cable Interlock” fault sensing circuit on the LED Board is
shown on Sheet 1 of the LED Board schematic diagram, at grid
locations F3-F6. The circuit consists of U4-12, R36, C24 and
U4-10.
A “Cable Interlocks-H” fault signal from the Cable Interlock
logic on the Modulation Encoder is inverted by U4-12, filtered
by R36-C24, and inverted by U4-10 to send a “Fault-H” logic
signal to Type 1 Fault gate U32 and to Cable Interlock status
latch circuit U34-1 and U18.
Q.5.2.7 Output Monitor and DC Regulator Regulated Sup-
ply Fault comparator circuits
The Output Monitor and DC Regulator regulated supply fault
comparator circuits are shown on Sheet 1 of the LED Board
schematic. Figure Q-8 includes simplified diagrams.
The comparators operate from a 5 VDC supply. When
a “fault” is sensed, the comparator output goes to +5 VDC
through a pull-up resistor.
The non-inverting input of each comparator is a fixed positive
reference voltage, derived from the Cont5 VDC regu-
lated supply. All “Type 1” comparator reference inputs are tied
together and come from a common voltage divider. If a supply
fault occurs the inverting input voltage goes below the reference
voltage and the comparator output goes HIGH.
Regulated voltage faults from the Output Monitor and the DC
Regulator are “Type 1 Faults”. The fault inputs are applied to
the inverting inputs of comparator U61. The non-inverting in-
puts are supplied by a fixed reference voltage. A fault will bring
the input line LOW and trigger the comparator. The Type 1
“Supply Fault” comparator outputs have capacitors to ground to
prevent transient voltages from causing false “Type 1” faults.
Section Q - LED Board (A32)
Rev. R: 11-11-96 888-2297-002 Q-9
WARNING: Disconnect primary power prior to servicing.