GE SBC330 3U VPX, Справочник по аппаратуре

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46 SBC330 3U VPX Single Board Computer Publication No. SBC330-0HH/3
6 • FPGA Registers
6.1 Register Names and Offsets
All registers are set up at 4 ‐ Byte offsets to allow for 32 ‐ bit registers, but most
registers are 16 bits or less. Unused bits in the registers are signaled as 0 from the
FPGA. The registers are defined as being little endian for ease of interpretation
using the emulator.
NOTE
In the default shipped VxWorks, FPGA registers begin at 0xFC00 0000.
Table 6-1 Register Offsets
Offset Register Name Type FPGA Rel 3 FPGA Rel 4
0x 0000 Interrupt Read/write
 
0x 0004 Interrupt Mask Read/write  
0x 0008 Interrupt Edge/Level Read only
 
0x 000C Board Revision Read/write  
0x 0010 BIT and User LEDs Read/write
 
0x 0014 BMM Control Read/write NA 
Blank address for expansion
0x 001C Geographic Address Read/write  
0x 0020 Platform Multiplier Read/write
 
0x 0024 Core Multiplier Read/write  
0x 0028 Miscellaneous Functions Read only
 
0x 002C Axis Timer 1 Read only  
0x 0030 Axis Timer 2 Read only
 
0x 0034 Axis Timer 3 Read only  
0x 0038 Axis Timer Control Read/write
 
0x 003C Backplane Status Read only  
0x 0040 Backplane Command Read/write
 
0x 0044 Flash Control Read/write  
0x 0048 Flash Password 1 Read/write
 
0x 004C Flash Password 2 Read only  
0x 0050 Flash Size Read only
 
0x 0054 GPIO Input Read/write  
0x 0058 GPIO Invert Read/write
 
0x 005C GPIO Direction Read/write  
0x 0060 GPIO Output Read/write
 
0x 0064 Scratch 1 Read/write  
0x 0068 Scratch 2 Read/write
 
0x 006C ID Read/write  