GE PACSystems RX7i, Руководство пользователя

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Chapter 9. Modbus/TCP Client
144 PACSystems* RX7i & RX3i TCP/IP Ethernet Communications User Manual GFK-2224Q
FT Output: The FT output is set if the PLC CPU (rather than the Ethernet interface) detects that the COMMREQ
fails. In this case, the other status indicators are not updated for this COMMREQ.
The COMMREQ Command Block
When the COMMREQ function is initiated, the Command Block is sent from the PLC CPU to the Ethernet
interface. The Command Block contains the details of a command to be performed by the Interface.
The address in CPU memory of the Command Block is specified by the IN input of the COMMREQ Function
Block. This address can be any valid address within a word-oriented area of memory. The Command Block is
usually set up using either the BLOCK MOVE or the DATA INIT COMM programming instruction. The Command
Block has the following structure:
Word 1 Data Block Length (words)
Word 2 WAIT/NOWAIT Flag
Word 3 CRS Word Memory Type
Word 4 CRS Word Address Offset
Word 5 Reserved
Word 6 Reserved
Words 7 and up Data Block (Channel Command Details)
When entering information for the Command Block, refer to these definitions:
(Word 1) Data Block Length: This is the length in words of the Data Block portion of the Command Block. The
Data Block portion starts at Word 7 of the Command Block. The length is measured from the beginning of the
Data Block at Word 7, not from the beginning of the Command Block. The correct value for each command,
and the associated length of each command, is specified in the next section.
(Word 2) WAIT/NOWAIT Flag: This flag must be set to zero for TCP/IP Ethernet Communications.
COMMREQ Status Word: The Ethernet interface updates the CRS word to show success or failure of the
command. Command words 3 and 4 specify the PLC memory location of the CRSW word.
(Word 3) COMMREQ Status Word Memory Type: This word specifies the memory type for the CRS word. The
memory types are listed in the table below:
Type
Value
(Decimal)
Value
(Hex.)
Description
%R 8 08H Register memory (word mode)
%AI 10 0AH Analog input memory (word mode)
%AQ 12 0CH Analog output memory (word mode)
%I
16
70
10H
46H
Discrete input memory (byte mode)
Discrete input memory (bit mode)
%Q
18
72
12H
48H
Discrete output memory (byte mode)
Discrete output memory (bit mode)
%T
20
74
14H
4AH
Discrete temporary memory (byte mode)
Discrete temporary memory (bit mode)
%M
22
76
16H
4CH
Discrete momentary internal memory (byte mode)
Discrete momentary internal memory (bit mode)
%G
56
86
38H
56H
Discrete global data table (byte mode)
Discrete global data table (bit mode)
%W 196 C4H Word memory (word mode limited to %W1 - %W65536)
(Word 4) COMMREQ Status Word Address Offset: This word contains the offset within the memory type
selected. The status word address offset is a zero-based number. For example, if you want %R1 as the