GE B30 UR Series, Инструкция по эксплуатации

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GE Multilin B30 Bus Differential System 5-113
5 SETTINGS 5.5 FLEXLOGIC
5
Figure 5–43: FLEXLOGIC EQUATION FOR VIRTUAL OUTPUT 4
7. Now write the complete FlexLogic expression required to implement the logic, making an effort to assemble the equa-
tion in an order where Virtual Outputs that will be used as inputs to operators are created before needed. In cases
where a lot of processing is required to perform logic, this may be difficult to achieve, but in most cases will not cause
problems as all logic is calculated at least four times per power frequency cycle. The possibility of a problem caused by
sequential processing emphasizes the necessity to test the performance of FlexLogic before it is placed in service.
In the following equation, virtual output 3 is used as an input to both latch 1 and timer 1 as arranged in the order shown
below:
DIG ELEM 2 OP
Cont Ip H1c On
NOT
AND(2)
= Virt Op 3
Virt Op 4 On
Virt Op 1 On
Virt Op 2 On
Virt Ip 1 On
DIG ELEM 1 PKP
XOR(2)
Virt Op 3 On
OR(4)
LATCH (S,R)
Virt Op 3 On
TIMER 1
Cont Ip H1c On
OR(3)
TIMER 2
= Virt Op 4
END
In the expression above, the virtual output 4 input to the four-input OR is listed before it is created. This is typical of a
form of feedback, in this case, used to create a seal-in effect with the latch, and is correct.
FLEXLOGIC ENTRY n:
Virt Op 3 On
FLEXLOGIC ENTRY n:
OR (4)
FLEXLOGIC ENTRY n:
LATCH (S,R)
91
92
93
FLEXLOGIC ENTRY n:
DIG ELEM 1 PKP
FLEXLOGIC ENTRY n:
XOR
89
90
XOR
FLEXLOGIC ENTRY n:
Virt Op 1 On
FLEXLOGIC ENTRY n:
Virt Op 2 On
FLEXLOGIC ENTRY n:
Virt Ip 1 On
86
87
88
FLEXLOGIC ENTRY n:
Virt Op 4 On
85
FLEXLOGIC ENTRY n:
=Virt Op 4
99
FLEXLOGIC ENTRY n:
OR (3)
FLEXLOGIC ENTRY n:
TIMER 2
96
97
98
FLEXLOGIC ENTRY n:
Virt Op 3 On
FLEXLOGIC ENTRY n:
TIMER 1
94
95
LATCH
Reset
Set
OR
OR
T1
T2
VIRTUAL
OUTPUT 4
827031A2.VSD
FLEXLOGIC ENTRY n:
Cont Ip H1c On