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5-2
MHT260a (Engl.)
The signal form of the [START] and the current position output varies depending on the upper level interface.
Auto start
Current position output
Amplifier
Current position output
Basic type (DI/DO position)
Current position can be outputted.
SX bus type (SX bus direct connection)
Current position can be outputted to IQ area.
T-link type (T-link direct connection)
Current position can be outputted to WB area.
5.2 Run command
This section explains the signals to run the motor and the signals to reset alarm detection.
Control input signal :
・
Run command [RUN] (1)
Control output signal :
・
Ready [RDY] ( 1)
・
Alarm reset [RST] (11)
・
CPU ready [CPURDY] (28)
・
Alarm detection [ALM] (16)
・
Alarm code 0 [ALM0] (32)
・
Alarm code 1 [ALM1] (33)
・
Alarm code 2 [ALM2] (34)
・
Alarm code 3 [ALM3] (35)
・
Alarm code 4 [ALM4] (36)
5.2.1 Run command [RUN]
The signal allows the motor to rotate.
Run command [RUN] (Control input signal)
■
Function
While the [RUN] signal is on, the motor is powered on and can rotate.
Even if commercial power is applied to amplifier, the motor will not start running while [RUN] is off.
When turning off this [RUN] signal while motor is running, motor decelerates quickly until it stops. After the stoppage, it is not held. No
holding torque is available after the motor stops.
While the [RUN] signal is turned off, all rotational commands are ignored.
Basically, motor can be rotated when [RUN] is on and the forced stop [EMG] signal is on.
While the [RUN] signal is on and other signals are off, the motor is in stopping condition.
Amplifier
Setting of position data
Basic type (DI/DO position)
Sets the data of specified station as the control input.
SX bus type (SX bus direct connection)
Writes the data of the specified station and the speed into IQ area.
T-link type (T-link direct connection)
Writes the data of the specified station into WB area.
SX
bus extension cable
K80791234
K80791234
K80791234
K80791234
L1
L1
L1
L1
L2
L2
L2
L2
L3
L3
L3
L3
DB
DB
DB
DB
P1
P1
P1
P1
N
NN
N
P+
P+
P+
P+
U
UU
U
V
VV
V
W
WW
W
CHARGE
CHARGE
CHARGE
CHARGE
FALDIC
FALDIC
FALDIC
FALDIC
SHIFT
SHIFT
SHIFT
SHIFT
ENT
ENT
ENT
ENT
RYS20
1
S3-LSS
RYS20
1
S3-LSS
RYS20
1
S3-LSS
RYS20
1
S3-LSS
MODE
MODE
MODE
MODE
ESC
ESC
ESC
ESC
APS30
APS30
APS30
APS30
PWR
PWR
PWR
PWR
ALM
ALM
ALM
ALM
SX
SX
SX
SX
SCPU32
SCPU32
SCPU32
SCPU32
LOADER
LOADER
LOADER
LOADER
RUN
RUN
RUN
RUN
TERM
TERM
TERM
TERM
SLV
SLV
SLV
SLV
STOP
STOP
STOP
STOP
CPU
CPU
CPU
CPU
No.
No.
No.
No.
ONL
ONL
ONL
ONL
ERR
ERR
ERR
ERR
RUN
RUN
RUN
RUN
ALM
ALM
ALM
ALM
BAT
BAT
BAT
BAT
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
O N L C H 1
O N L C H 1
O N L C H 1
O N L C H 1
E R R C H 2
E R R C H 2
E R R C H 2
E R R C H 2
E M G + O T ‑ O T
E M G + O T ‑ O T
E M G + O T ‑ O T
E M G + O T ‑ O T
2 0
2 0
2 0
2 0
1
11
1
B / A
B / A
B / A
B / A
HP2
HP2
HP2
HP2
O N L
O N L
O N L
O N L
E R R
E R R
E R R
E R R
PE1
PE1
PE1
PE1
PH
PH
PH
PH
PL
PL
PL
PL
DA
DA
DA
DA
C H
C H
C H
C H
N o .
N o .
N o .
N o .
SCPU32
SCPU32
SCPU32
SCPU32
LOADER
LOADER
LOADER
LOADER
RUN
RUN
RUN
RUN
TERM
TERM
TERM
TERM
SLV
SLV
SLV
SLV
STOP
STOP
STOP
STOP
CPU
CPU
CPU
CPU
No.
No.
No.
No.
ONL
ONL
ONL
ONL
ERR
ERR
ERR
ERR
RUN
RUN
RUN
RUN
ALM
ALM
ALM
ALM
BAT
BAT
BAT
BAT
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
Содержание Faldic-a RYS-R Series
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