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13 UART (UART3)
13-4
Seiko Epson Corporation
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
UART3_nMOD register
PREN bit
0
1
0
1
0
1
0
1
STPB bit
0
0
1
1
0
0
1
1
CHLN bit
0
0
0
0
1
1
1
1
st: start bit, sp: stop bit, p: parity bit
st
D0
D1
D2
D3
D4
D5
D6
sp
st
D0
D1
D2
D3
D4
D5
D6
p
sp
st
D0
D1
D2
D3
D4
D5
D6
sp
sp
st
D0
D1
D2
D3
D4
D5
D6
p
sp
sp
st
D0
D1
D2
D3
D4
D5
D6
D7
sp
st
D0
D1
D2
D3
D4
D5
D6
D7
p
sp
st
D0
D1
D2
D3
D4
D5
D6
D7
sp
sp
st
D0
D1
D2
D3
D4
D5
D6
D7
p
sp
sp
Figure 13.4.1 Data Format
13.5 Operations
13.5.1 Initialization
The UART3 Ch.
n
should be initialized with the procedure shown below.
1. Assign the UART3 Ch.
n
input/output function to the ports. (Refer to the “I/O Ports” chapter.)
2. Set the UART3_
n
CLK.CLKSRC[1:0] and UART3_
n
CLK.CLKDIV[1:0] bits. (Configure operating clock)
3. Configure the following UART3_
n
MOD register bits:
- UART3_
n
MOD.BRDIV bit
(Select baud rate division ratio (1/16 or 1/4))
- UART3_nMOD.INVRX bit
(Enable/disable USIN
n
input signal inversion)
- UART3_nMOD.INVTX bit
(Enable/disable USOUT
n
output signal inversion)
- UART3_
n
MOD.PUEN bit
(Enable/disable USIN
n
pin pull-up)
- UART3_
n
MOD.OUTMD bit
(Enable/disable USOUT
n
pin open-drain output)
- UART3_
n
MOD.IRMD bit
(Enable/disable IrDA interface)
- UART3_
n
MOD.CHLN bit
(Set data length (7 or 8 bits))
- UART3_
n
MOD.PREN bit
(Enable/disable parity function)
- UART3_
n
MOD.PRMD bit
(Select parity mode (even or odd))
- UART3_
n
MOD.STPB bit
(Set stop bit length (1 or 2 bits))
- UART3_
n
MOD.CAREN bit
(Enable/disable carrier modulation function)
- UART3_nMOD.PECAR bit
(Select carrier modulation period (H data period/L data period))
4. Set the UART3_
n
BR.BRT[7:0] and UART3_
n
BR.FMD[3:0] bits. (Set transfer rate)
5. Set the UART3_
n
CAWF.CRPER[7:0] bits.
(Set carrier cycle)
6. Set the following UART3_
n
CTL register bits:
- Set the UART3_
n
CTL.SFTRST bit to 1.
(Execute software reset)
- Set the UART3_
n
CTL.MODEN bit to 1.
(Enable UART3 Ch.
n
operations)
7. Set the following bits when using the interrupt:
- Write 1 to the interrupt flags in the UART3_
n
INTF register.
(Clear interrupt flags)
- Set the interrupt enable bits in the UART3_
n
INTE register to 1. * (Enable interrupts)
*
The initial value of the UART3_
n
INTF.TBEIF bit is 1, therefore, an interrupt will occur immediately after
the UART3_
n
INTE.TBEIE bit is set to 1.
8. Configure the DMA controller and set the following UART3 control bits when using DMA transfer:
- Write 1 to the DMA transfer request enable bits in the
UART3_
n
TBEDMAEN and UART3_
n
RB1FDMAEN registers. (Enable DMA transfer requests)