DH Instruments PPC2+, Руководство пользователя

Страница: 125 / 166

PPC2+™ Operation and Maintenance Manual
Page 117
©2001 DH Instruments, Inc.
4.5.2 STATUS BYTE REGISTER
The PPC2+ contains an 8 bit Status Byte Register that reflects the general status of
the PPC2+:
Table 14. 8 Bit Status Byte Register
OPER
(128)
RQS/MSS
(64)
ESB
(32)
MAV
(16)
N/A
(8)
ERROR
(4)
N/A
(2)
RSR
(1)
This register is affected by the PPC2+ reply output queue, the Error Queue, the Standard
Event Status register and the Ready Event Status register:
Status Byte Register
(“
∗
STB?” or ”
∗
SRE n”)
OPER
(128)
RQS/MSS
(64)
Standard Event Status Register
(“
∗
ESR?” or “
∗
ESE n”)
ESB
(32)
←←←
PON
(128)
URQ
(64)
CMD
(32)
EXE
(16)
DDE
(8)
QYE
(4)
RQC
(2)
OPC
(1)
MAV
(16)
←←←
OUTPUT
QUEUE
N/A
(8)
ERROR
(4)
←←←
ERROR
QUEUE
N/A
(2)
Ready Event Status Register
(“RSR?” or ” RSE n”)
RSR
(1)
←←←
N/A
(128)
N/A
(64)
N/A
(32)
N/A
(16)
N/A
(8)
MEAS
(4)
NRDY
(2)
RDY
(1)
Figure 11. Status Register Schematic