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Plexus 9000 Planning and Engineering Guide
Rear System Processor 3
Section 130-120-260
Issue 1, April 23, 2004
Telica, Inc.
5-85
P1040-AA
03-19-04
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DS1 TEST
ENET
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MON-PRT-T
UNUSED
TST-PRT-T
TST-PRT-R
Figure 5.6-5. Monitor Jacks
The monitor jacks are connected via the midplane to the QFALC of the
front System Processor module
.
Refer to
The FALC
receives the DS-0s from the IOM, multiplexes them into a single DS-1,
and sends the DS-1 to the rear module and the monitor jacks. Test
equipment can now be connected to monitor the signals.