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Plexus 9000 Planning and Engineering Guide
Front Dual System Processor Timing Module 2
Section 130-120-210
Issue 1, April 23, 2004
Telica, Inc.
5-45
5.3.3.2 Timing
Section
Clocks and Synchronization
The front SP module contains the timing and clock circuitry for the
Plexus 9000. The Quad T1 Framer/LIU receives the primary A and
secondary B analog BITS inputs from the wire-wrap inputs of each of the
rear SF modules by way of the midplane. It converts them to digital.
Recovered timing from IOM-1 and 2 or IOM-8 and 10 can also be used.
The timing circuitry of the SP also contains an internal Stratum 3 clock
that is used for system timing. The clocks are provisioned using the
ENT/ED T1 TL1 command. The TMG section provides multiplexing
control for routing each of the input clock signals and is responsible for
routing these clocks to the individual IOMs in the chassis. Each module
has a clock fault detector.
The TMG also provides control circuitry for selecting the master clock
source, supporting failover from the master to the secondary, and
generating interrupts when failures on the input clock lines occur. Even
though the clock circuitry resides on the SP module, a failure of the BITS
or line timing input does not require a SP fail over. Likewise, because the
BITS or line timing inputs feed the timing circuitry of both SPs, a failure
of the SP module does not require a change over of the BITS or line
timing input.
EEPROM
The front SP also has an EEPROM (not shown) that contains the CLEI
code for the module. All modules have a CLEI code so that missing and
incompatible replaceable equipment can be alarmed.
Monitoring Using the Jacks of the Rear Module
The rear SP modules have monitor jacks that are connected to the Quad
T1 Framer/LIU of the front module via the midplane as illustrated in
The framer multiplexes the monitored DS-0s from an IOM
into a single DS1. The DS0s are typically ISDN D-channels or SS7
signaling channels, although a single DS1 could be monitored. However,
ISDN D-channels and SS7 signaling channels cannot be monitored on the
same DS-1. The DS-0s to be monitored must be on the same IOM and are
selected with TL1 commands. The test jacks are also selected with a TL1
command.