6RL SERIES OPERATION MANUAL
SECTION 7: REMOTE PROGRAMMING
Entire Contents Copyright
2018 by Adaptive Power Systems, Inc. (APS) • All Rights Reserved • No reproduction without written authorization from APS.
6RL Series Regenerative DC Load Operation Manual
Page 146 of 204
STAT:QUES? --> 3072 Reads the event register. This value tells, that bits 10 and 11 are
set and accord- ing to the register model this is interpreted as
“remote control = active” and “DC input/output = on”.
STAT:QUES:COND?
Reads the condition register of the questionable status register.
The value contains the current snapshot of a number of status
bits.
7.12.5.2
STATus:QUEStionable:ENABle
˽
<NR1>
This command sets or read the Enable register of the Questionable status register. The
Enable register is a filter that enables all or single bits to signal an event to the status byte
STB. By default, all bits of the Enable register are set. In case you want to ignore certain bits,
you just need to add the values of the remaining bits and send the value to the Enable
register.
Query form:
STATus:QUEStionable:ENABle?
Value range:
0...32767
Example:
STAT:QUES:ENAB˽3072 Sets the enable register of the questionable status registers to
3072 and enables the bits “OVP“, “OT“, “Remote“ and
“Input/Output on“ for event reporting to STB.
7.12.5.3
STATus:OPERation?
Reads the Operation status EVENT or CONDITION register. The unit will return a 16 bit value,
which represents unit information as defined in the register model.
Query form 1:
STATus:OPERation:CONDition?
Query form 2:
STATus:OPERation:EVENt?
Query form 2:
STATus:OPERation?
Examples:
STAT:OPER? --> 256
Reads the operation register (identical to :EVENt?). A possible
response would be a value of 256, which tells, that bit 8 is set
and according to the register model bit 8 signals, that “CV“
(constant voltage regulation) is active.
STAT:OPER:COND?
Reads the condition register of the operation status registers.
7.12.5.4
STATus:OPERation:ENABle
˽
<NR1>
Sets or reads the Enable register of the Questionable status register. The Enable register is a
filter. It enables single or all bit of the condition registers to change the corresponding bit in
the event register. This also impacts the summary bit in the status byte STB. By default, all
bits of the Enable register are set to 1. If you want to use only some specific bits to be left
through, just add their bit values (see register model) and send the total to the Enable
register.
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