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SERVICE MANUAL
R5888C
QUADRAMHO
Chapter 2
Page 7 of 74
The seventh level detector is the high-set neutral LDHSN. The neutral current is
produced by summing and amplifying by G3 the three phase currents. This gives a
setting of 16%
I
n
at K1 + K2 = 4.8. Timer t
1
is 0.155 cycle and time t
2
is 1.1
cycles. The reference for the high set neutral and the low set neutral (see Zone 3
module) is modified by the phase-phase currents to give a variable pick up level,
as described in Section 5.11.
The reference is the largest instantaneous value of the three precision rectified
phase-phase currents. The signal, smoothed by the R and C and limited by zener
diode D is buffered and split into two signals for the high set and low set level
detectors. In each case the negative reference is obtained by inverting the positive.
To prevent chatter each level detector has10% hysterisis. This is achieved by
reducing the reference on individual level detectors when they operate. The
hysterisis for the low set neutral is also on this board, controlled by the level
detector in the Zone 3 module.
4.6
Phase and neutral and
I
R setting board ZH0730
The right hand board sets the basic reach of the relay in conjunction with the zone
multiplier modules. In addition, for the quadrilateral relay, it sets the relay resistive
reach. See Figure 10.
The signals present on inputs
I
A
1,
I
A
2,
I
B
1,
I
B
2,
I
C
1
and
I
C
2
are attenuated by the
resistor networks controlled by switches K1 and K2 on the relay facia, to produce
the relay phase setting ZPh (ganged for all phases). Similarly the signals on
I
N
1
,
I
N
2
and
I
N
3 are attenuated under the control of K4, K5 and K6 to produce the
neutral compensation factor setting, ZN.
A summary of the function and resolution of each of the switches above is given in
table 1.
Each of the attenuated signals is passed through a low pass filter and a band pass
filter. The first order low pass filter has a cut-off frequency of 300Hz and the band
pass filter has a centre frequency equal to the power system frequency and a Q
factor of 0.5
. The resulting signals, –
I
A
Z
Ph
~, –
I
B
Z
Ph
~,
I
C
Z
Ph
and +
I
N
Z
N
– are
output from the pcb directly and also further processed by the squaring operational
amplifiers which mix the +
I
N
Z
N
~ with each of the other Z
Ph
signals to produce
square waves labelled
I
A
Z
Ph
–
I
B
Z
Ph
and = ~
I
c
Z
Ph
.
Sinusoidal signals LD
I
A
, LD
I
B
and LD
I
C
which are used by the level detectors are
extracted after the low pass filters and before the band pass filters.
For the quadrilateral relay only, signals V
A
’, V
B
’ and V
C
’ are attenuated by the
resistor networks controlled by K
3
to produce the relay resistive reach (see Table
1). These signals are mixed with the signals
I
A
R,
I
B
R and
I
C
R which have been
filtered as above to produce the (V +
I
R), (V –
I
R) and
I
R voltage vectors for each
phase. The neutral
I
R sinusoid is produced by summing the three phase
I
R
sinusoids.
When the relay carries out a self checking procedure it is necessary for the
I
A
R,
I
B
R and
I
C
R and
I
N
R signals to be replaced by the V
A
CP, V
B
CP, V
C
CP and V
N
CP
signals respectively. This is achieved using digital switches controlled by the
scheme logic.
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