Alstom SHPM 101, Руководство по обслуживанию

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SERVICE MANUAL R5888C
QUADRAMHO Chapter 2
Page 45 of 74
comparators, a special logic feature is employed (See Figure 65) whereby if the
“high set” detector operates for 35ms without any Z1/Z2 ground fault comparator
operating, then the “high set” block of the phase fault comparator is removed.
5.12 Other level detectors
When the operating requirements of level detectors are not as stringent as for those
previously described, an alternative level detector design has been used which
offers lower cost. These level detectors are used in the VTs function and for the
Blocking scheme and permissive overreach scheme with weak infeed.
5.13 Power swing blocking
The power swing blocking (PSB) feature utilises two sets of phase-phase (A–B)
connected comparators producing two concentric characteristics. One comparator
is the A–B phase comparator of Zone 3 and the outer characteristic (Z6) is
produced by the other comparator whose reach settings of which are related to
those of Zone 3.
If the Zone 3 A–B phase characteristic is the offset mho version then Z6 will also
be offset mho. if the Zone 3 A–B phase characteristic is lenticular, then so will be
the Zone 6 characteristic. Also, for the lenticular version, the aspect ratios of Zone
3 and Zone 6 will be the same.
The action of the PSB is independent of Zones 1 and 2, provided that Zone 3 is set
to completely surround these zones. Three switches are provided on the scheme
logic module frontplate, so that blocking can be applied selectively to Zone 1
and/or Zone 2 and/or Zone 3, as required. A further switch, SW9, on the scheme
logic module, allows the PSB feature to be disabled if not required. With SW9 in
the left hand position, the PSB feature is disabled and with SW9 in the right hand
position, the PSB feature is enabled.
The Zone 6 forward reach is 1.3 times the Z3 forward reach and the Zone 6
reverse reach is equal to the Zone 3 reverse plus 0.3 times the Zone 3 forward
setting ie:
Z6
F
= 1.3 x Z3
F
Z6' = Z3' + (0.3 x Z3
F
)
The equivalent hardware logic diagram of the PSB is shown in Figure 60.
This logic is implemented as software in the scheme logic microcomputer module.
Figure 59 also shows an example of how a power swing can pass through the
characteristics of the relay. The impedance of the power swing is detected initially
by Zone 6 and in the absence of any other comparator operating a 50ms timer is
started. When the 50ms timer expires a bistable is set. When the power swing
impedance then enters the Zone 3 characteristic the output bistable is set,
producing the signal PS which is used to inhibit Zone 1 and/or Zone 2 and/or
Zone 3 as required. Resetting of the Zone 3 comparator has not effect on the
inhibit signal produced by the logic, due to the action of the outpur bistable.
The power swing inhibit signal PS is only removed when the power swing
impedance passes outside the Zone 6 characteristic. This arrangement ensures that
the PSB cannot produce a blocking signal for fault conditions which appear inside
Zone 6 alone, or inside any Z1/Z2/Z3 comparator.
The power swing blocking in inhibited during the following conditions:
1) When the A or B poles of the circuit breaker are open. This ensures that the PSB
feature does not block tripping if the measurement of the PSB feature is affected