Publication 1763-RM001C-EN-P - October 2009
Using the High-Speed Counter and Programmable Limit Switch
99
Low Preset Mask (LPM)
The LPM (Low Preset Mask) control bit is used to enable (allow) or
disable (not allow) a low preset interrupt from occurring. If this bit is clear
(0), and a Low Preset Reached condition is detected by the HSC, the HSC
user interrupt is not executed.
This bit is controlled by the user program and retains its value through a
power cycle. It is up to the user program to set and clear this bit.
Low Preset Interrupt (LPI)
The LPI (Low Preset Interrupt) status bit is set (1) when the HSC
accumulator reaches the low preset value and the HSC interrupt has been
triggered. This bit can be used in the control program to identify that the
low preset condition caused the HSC interrupt. If the control program
needs to perform any specific control action based on the low preset, this
bit would be used as conditional logic.
This bit can be cleared (0) by the control program and is also be cleared
by the HSC sub-system whenever these conditions are detected:
•
High Preset Interrupt executes
•
Underflow Interrupt executes
•
Overflow Interrupt executes
•
Controller enters an executing mode
Description Address
Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (MOD) on page 107.
Type
User Program Access
LPM - Low
Preset Mask
HSC:0/LPM bit
2 to 7
control read/write
Description
Address
Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (MOD) on page 107.
Type
User Program Access
LPI - Low
Preset Interrupt
HSC:0/LPI bit
2 to 7
status read/write
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