Publication 1763-RM001C-EN-P - October 2009
Knowledgebase Quick Starts
551
Verifying data has been sent:
To verify the data has been sent to node 4 disconnect the PM02 cable and
connect the PC running RSLogix 500 to the ML1000 (Node 4). Go to N7:0
and view the data, this should match the data in N7:0 of node 1.
Another way to verify the data is being sent to node 4 is to replace the
Target Device Data Table Address
with an output modules address. In
this example the output module is a ML1000, the address would be O:0.0
This will display, in binary on the output LEDS, what ever number that
was entered into N7:0 of the ML1100.
IMPORTANT NOTE:
By addressing O:0.0 the outputs of the destination
processor will be energized upon successful transmission of data. Verify
that nothing is connected to the outputs to ensure safe operation of the
controller.
If a 16 Point MicroLogix 1000 is being used as the destination processor
(Node 1), and the number
63
is entered into the above example, all the
outputs will be energized or turn. If the number entered is greater then 63
then a fault may occur with an error stating that the extended I/O bit (S:0/
8) was not set. In this case clear the fault, go offline, set bit (S:0/8) and
re-download the ladder program.
The above example uses the DF1 Full Duplex protocol. This is a point to
point or One Device to One Device protocol, using this protocol no other
devices can be connected. To create a network of multiple processors or
devices use the DH485 protocol and 1761-NET-AIC devices.
Note:
This example was written using a ML1100 communicating to a
ML1000, however any DF1 or DH485 device could have been substituted
for the ML1000. (i.e. MicroLogix 1200, MicroLogix1500, SLC 5/03, 5/04, 5/
05, PLC-5, Bar Code Scanners, etc.)
# 17501 “Quick Start”
Selectable Timed
Interrupt (STI)
What is an Interrupt?
An interrupt is an event that causes the processor to suspend the task it is
currently performing, perform a different task, and then return to the
suspend task at the point where it suspended.
STI Definition
The STI provides a mechanism to solve time critical control requirements.
The STI is a trigger mechanism that allows you to scan or solve control
program logic that is time sensitive.
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