Xilinx VCU110, User Manual

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VCU110 Evaluation Board www.xilinx.com 82
UG1073 (v1.2) March 26, 2016
Chapter 1: VCU110 Evaluation Board Features
10/100/1,000Mb/s Tri-Speed Ethernet PHY
[ Figure 1-2 , callout 18]
The VCU110 evaluation board uses the Marvell Alaska PHY device (88E1111) at U58 for
Ethernet communications at 10 Mb/s, 100 Mb/s, or 1,000 Mb/s. The board supports SGMII
mode only. The PHY connection to a user-provided Ethernet cable is through RJ-45
connector P3, a Halo HFJ11-1G01E-L12RL with built-in magnetics and status LEDs.
On power-up, or on reset, the PHY is configured to operate in SGMII mode with PHY
address
0b00111
using the settings shown in Table 1-44 . These settings can be over
written using software commands passed over the MDIO interface.
Table 1-44: Board Connections for PHY Configuration Pins
Pin Bit[2] Bit[1] Bit[0] Description
Pin to Constant Mapping
Pin Bit[2:0]
CFG0 PHYADR[2] PHYADR[1] PHYADR[0]
111
PHYAddr
00111
.
Do not advertise
the PAUSE bit.
VCC2V5
111
CFG1 ENA_PAUSE PHYADR[4] PHYADR[3]
000
LED_LINK10
110
CFG2 ANEG[3] ANEG[2] ANEG[1]
111
Auto-Neg en,
advertise all caps;
prefer slave. Auto
crossover enabled.
125 CLK option
disabled.
LED_LINK100
101
CFG3 ANEG[0] ENA_XC DIS_125
111
LED_LINK1000
100
CFG4 HWCFG_MD[2] HWCFG_MD[1] HWCFG_MD[0]
100
SGMII to Cu mode.
Fiber/copper
auto-detect
disabled. Sleep
move disabled.
LED_DUPLEX
011
CFG5 DIS_FC DIS_SLEEP HWCFG_MD[3]
110
LED_RX
010
CFG6 SEL_BDT INT_POL 75/50 OHM
010
MDC/MDIO
selected.
Active-Low
interrupt. 50
Ω
SerDes option.
LED_TX
001
GND
000
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